公开(公告)号：US20120248431A1

公开(公告)日：2012-10-04

申请号：US13183838

申请日：2011-07-15

Applicant: Ya-Huei HUANG ,  Kuan-Yu Chen ,  Ying-Hui Chen ,  Te-Yu Chen

Inventor： Ya-Huei HUANG ,  Kuan-Yu Chen ,  Ying-Hui Chen ,  Te-Yu Chen

IPC: H01L29/786

CPC classification number: H01L27/1225

Abstract: A transistor array substrate includes a substrate, a plurality of scan lines, a plurality of data lines and a plurality of pixel units. The scan lines and the data lines are all disposed on the substrate. Each pixel unit includes a transistor and a pixel electrode. The transistor is electrically connected to the pixel electrodes, the scan lines and the data lines. Each transistor includes a gate, a drain, a source, a metal-oxide-semiconductor layer and a channel protective layer. A channel gap exists between the drain and the source. The metal-oxide-semiconductor layer has a pair of side edges opposite to each other and the side edges are located at two ends of the channel gap. The channel protective layer covers the metal-oxide-semiconductor layer in the channel gap and protrudes from the side edges of the metal-oxide-semiconductor layer.

Abstract translation: 晶体管阵列基板包括基板，多条扫描线，多条数据线和多个像素单元。 扫描线和数据线都设置在基板上。 每个像素单元包括晶体管和像素电极。 晶体管电连接到像素电极，扫描线和数据线。 每个晶体管包括栅极，漏极，源极，金属氧化物半导体层和沟道保护层。 漏极和源极之间存在沟道间隙。 金属氧化物半导体层具有彼此相对的一对侧边缘，并且侧边缘位于沟道间隙的两端。 沟道保护层覆盖沟道间隙中的金属氧化物半导体层，并从金属氧化物半导体层的侧边缘突出。

公开(公告)号：US08263451B2

公开(公告)日：2012-09-11

申请号：US12713573

申请日：2010-02-26

Applicant: Chien-Chang Su ,  Tsz-Mei Kwok ,  Hsien-Hsin Lin ,  Hsueh-Chang Sung ,  Yi-Fang Pai ,  Kuan-Yu Chen

Inventor： Chien-Chang Su ,  Tsz-Mei Kwok ,  Hsien-Hsin Lin ,  Hsueh-Chang Sung ,  Yi-Fang Pai ,  Kuan-Yu Chen

IPC: H01L21/336 ,  H01L21/8234

CPC classification number: H01L29/66795 ,  H01L21/02532 ,  H01L21/02636 ,  H01L21/823431 ,  H01L21/823821 ,  H01L29/785

Abstract: A method of forming an integrated circuit structure includes providing a wafer including a substrate and a semiconductor fin at a major surface of the substrate, and performing a deposition step to epitaxially grow an epitaxy layer on a top surface and sidewalls of the semiconductor fin, wherein the epitaxy layer includes a semiconductor material. An etch step is then performed to remove a portion of the epitaxy layer, with a remaining portion of the epitaxy layer remaining on the top surface and the sidewalls of the semiconductor fin.

Abstract translation: 一种形成集成电路结构的方法包括在衬底的主表面上提供包括衬底和半导体鳍片的晶片，并且执行沉积步骤以在半导体鳍片的顶表面和侧壁上外延生长外延层，其中 外延层包括半导体材料。 然后执行蚀刻步骤以去除外延层的一部分，其中外延层的剩余部分保留在半导体鳍片的顶表面和侧壁上。

公开(公告)号：US20120223353A1

公开(公告)日：2012-09-06

申请号：US13472456

申请日：2012-05-15

Applicant: Kuan-Yu Chen

Inventor： Kuan-Yu Chen

IPC: H01L33/60

CPC classification number: H01L33/58

Abstract: A light-emitting diode structure includes a base with a recessed portion, a light-emitting chip and a light-transmissive block. The light-emitting chip disposed in the recessed portion of the base and emits a light beam. The light-transmissive block disposed on the base covers the recessed portion and the light-emitting chip, so that the light beam emitted from the light-emitting chip is radiated outwardly via the light-transmissive block. The light-transmissive block is a flat-top multilateral cone including a bottom surface, a top surface, and several side surfaces connected to and located between the bottom surface and the top surface. A slot with a bottom portion is formed on the top surface of the light-transmissive block.

Abstract translation: 发光二极管结构包括具有凹部的基座，发光芯片和透光块。 发光芯片设置在基座的凹部中并发射光束。 设置在基座上的透光块覆盖凹部和发光芯片，使得从发光芯片发射的光束经由透光块向外辐射。 透光块是包括底表面，顶表面和连接到并位于底表面和顶表面之间的几个侧表面的平顶多边锥。 具有底部的槽形成在透光块的顶表面上。

公开(公告)号：US08179683B2

公开(公告)日：2012-05-15

申请号：US12389381

申请日：2009-02-20

Applicant: Huang-Pin Lin ,  Chien-Cheng Lin ,  Jian-Lin Chen ,  Kuan-Yu Chen ,  Yi-An Chien ,  Hung-Tsai Weng

Inventor： Huang-Pin Lin ,  Chien-Cheng Lin ,  Jian-Lin Chen ,  Kuan-Yu Chen ,  Yi-An Chien ,  Hung-Tsai Weng

IPC: G09G3/32

CPC classification number: G02F1/13452 ,  G02F1/133382 ,  G02F2001/133314

Abstract: A display device includes a display panel, a flexible printed circuit and a back light module. The flexible printed circuit is suitable for supporting the driving element and is electrically connected to the display panel. The back light module includes at least one light source, a first frame and a second frame. The second frame surrounds the light source, the first frame surrounds the second frame, and the display panel and the flexible printed circuit are disposed at one side of the first frame, wherein the first frame has at least an opening, the second frame has a element contacting surface, the driving element is disposed on the flexible printed circuit, and the element contacting surface protrudes from the opening for being connected to the driving element.

Abstract translation: 显示装置包括显示面板，柔性印刷电路和背光模块。 柔性印刷电路适用于支撑驱动元件并与显示面板电连接。 背光模块包括至少一个光源，第一框架和第二框架。 第二框架围绕光源，第一框架围绕第二框架，并且显示面板和柔性印刷电路设置在第一框架的一侧，其中第一框架具有至少一个开口，第二框架具有 元件接触表面，驱动元件设置在柔性印刷电路上，并且元件接触表面从开口突出以连接到驱动元件。

公开(公告)号：US20120113068A1

公开(公告)日：2012-05-10

申请号：US13080617

申请日：2011-04-05

Applicant: Kuan-Yu Chen ,  Yi-Suei Liao

Inventor： Kuan-Yu Chen ,  Yi-Suei Liao

IPC: G06F3/038 ,  G11C19/00 ,  G09G3/36

CPC classification number: G09G3/3677 ,  G09G2230/00 ,  G09G2310/0286 ,  G11C19/28

Abstract: An LCD device is configured to drive a plurality of shift register units using two clock signals having different driving abilities. Each shift register unit may thus generate a stronger signal for triggering a next-stage shift register unit, thereby improving cold-start. When the LCD device has been activated over a predetermined period of time, the driving ability of the clock signal having higher driving ability is gradually lowered, thereby reducing power consumption.

Abstract translation: LCD装置被配置为使用具有不同驱动能力的两个时钟信号来驱动多个移位寄存器单元。 因此，每个移位寄存器单元可以产生用于触发下一级移位寄存器单元的更强信号，从而改善冷启动。 当LCD装置在预定时间段内被激活时，具有较高驱动能力的时钟信号的驱动能力逐渐降低，从而降低功耗。

公开(公告)号：US08152569B2

公开(公告)日：2012-04-10

申请号：US13091129

申请日：2011-04-21

Applicant: Kuan-Yu Chen ,  Chong Yi ,  James M. Sabo ,  Joseph Ortega ,  Gary E. Biddle

Inventor： Kuan-Yu Chen ,  Chong Yi ,  James M. Sabo ,  Joseph Ortega ,  Gary E. Biddle

IPC: H01R24/00

CPC classification number: H01R24/60

Abstract: An extension to USB includes an insulative tongue portion and a number of contacts held in the insulative tongue portion. The contacts have four conductive contacts and a plurality of differential contacts for transferring differential signals located behind/forward the four standard USB contacts along a front-to-rear direction. The four conductive contacts are adapted for USB 2.0 protocol and the plurality of differential contacts are adapted for non-USB 2.0 protocol. The extension to USB is capable of mating with a complementary standard USB 2.0 connector and a non-USB 2.0 connector, alternatively.

Abstract translation: USB的延伸部包括绝缘舌部和保持在绝缘舌部中的多个触点。 触点具有四个导电触点和多个差分触点，用于沿着前后方向传送位于四个标准USB触点之后/之后的差分信号。 四个导电触点适用于USB 2.0协议，多个差分触点适用于非USB 2.0协议。 USB的扩展能够与互补的标准USB 2.0连接器和非USB 2.0连接器配合使用。

公开(公告)号：US20110317803A1

公开(公告)日：2011-12-29

申请号：US13042702

申请日：2011-03-08

Applicant: Chen-Lun CHIU ,  Yi-Suei Liao ,  Ping-Lin Chen ,  Kuan-Yu Chen

Inventor： Chen-Lun CHIU ,  Yi-Suei Liao ,  Ping-Lin Chen ,  Kuan-Yu Chen

IPC: G11C19/00

CPC classification number: G11C19/28 ,  G09G3/20 ,  G09G2310/0286

Abstract: An exemplary shift register circuit includes a plurality of shift registers for sequentially outputting a plurality of driving pulse signals. Among each M number of the shift registers for sequentially outputting M number of the driving pulse signals, the shift register for lastly outputting one of the M number of driving pulse signals is enabled, by (M−1) number of start pulse signals sequentially outputted from the remained (M−1) number of the shift registers, to generate the driving pulse signal. Herein, M is a positive integer greater than 2. Moreover, a circuit structure of a shift register also is provided.

Abstract translation: 示例性移位寄存器电路包括用于顺序地输出多个驱动脉冲信号的多个移位寄存器。 在每个M个用于顺序地输出M个驱动脉冲信号的移位寄存器中，最后输出M个驱动脉冲信号中的一个的移位寄存器被使能，通过（M-1）个顺序输出的起始脉冲信号 从剩余（M-1）个移位寄存器的数量，产生驱动脉冲信号。 这里，M是大于2的正整数。此外，还提供了移位寄存器的电路结构。

公开(公告)号：US20110230651A1

公开(公告)日：2011-09-22

申请号：US12929883

申请日：2011-02-23

Applicant: Ji-Wang Chern ,  Grace Shiahuy Chen ,  Pei-Teh Chang ,  Kuan-Yu Chen ,  Meng-Ling Chen ,  Hsueh-Yun Lee ,  Chiung Hua Huang ,  Chun-Tang Chiou

Inventor： Ji-Wang Chern ,  Grace Shiahuy Chen ,  Pei-Teh Chang ,  Kuan-Yu Chen ,  Meng-Ling Chen ,  Hsueh-Yun Lee ,  Chiung Hua Huang ,  Chun-Tang Chiou

IPC: C09B29/00 ,  C07D403/12 ,  C07D209/58 ,  C07D209/08

CPC classification number: C07D209/08 ,  C07D209/40 ,  C07D209/88 ,  C07D409/12

Abstract: The present invention is related to derivatives of benzenesulfonamide represented by formula (I), and the pharmaceutical composition thereof. In addition, the benzenesulfonamide derivatives disclosed in the present invention can serve as potential cell cycle inhibitors, and thereby these benzenesulfonamide derivatives and the pharmaceutical composition thereof can be antitumor drug candidates, which might aim at cell cycle. Particularly, the benzenesulfonamide derivatives disclosed in the present invention may function as antitumor drugs to treat solid cancers.

Abstract translation: 本发明涉及由式（I）表示的苯磺酰胺的衍生物及其药物组合物。 此外，本发明公开的苯磺酰胺衍生物可以作为潜在的细胞周期抑制剂，因此这些苯磺酰胺衍生物及其药物组合物可以是可能针对细胞周期的抗肿瘤药物候选物。 特别地，本发明中公开的苯磺酰胺衍生物可用作治疗固体癌症的抗肿瘤药物。

公开(公告)号：US20110199370A1

公开(公告)日：2011-08-18

申请号：US12814835

申请日：2010-06-14

Applicant: Ann-Shyn Chiang ,  Hsiu-Ming Chang ,  Yung-Chang Chen ,  Kuan-Yu Chen

Inventor： Ann-Shyn Chiang ,  Hsiu-Ming Chang ,  Yung-Chang Chen ,  Kuan-Yu Chen

IPC: G06T15/00 ,  G06T11/20

CPC classification number: G06T11/203 ,  G06T7/33 ,  G06T11/206 ,  G06T11/40 ,  G06T19/00 ,  G06T2207/10056 ,  G06T2207/30016

Abstract: The present invention discloses an image processing method for feature retention associated with averaging processes. The image processing method comprises: scaling and aligning a plurality of image data for acquiring feature information; determining a plurality of two-dimensional feature label points according to the feature information for generating at least one Bezier curve; utilizing the at least one Bezier curve to generate at least one Bezier tube and performing Bezier tube fitting for generating result of Bezier tube fitting; deforming the plurality of image data according to the Bezier tube or the result of Bezier tube fitting for generating a plurality of deformed image data; and averaging the plurality of deformed image data for generating feature-preserved average image data. The present invention also provides an image processing system, a computer readable storage medium, and a computer program product, for implementing the image processing method.

Abstract translation: 本发明公开了一种与平均处理相关的特征保留的图像处理方法。 图像处理方法包括：对多个图像数据进行缩放和对准以获取特征信息; 根据用于生成至少一个贝塞尔曲线的特征信息确定多个二维特征标记点; 利用至少一个贝塞尔曲线生成至少一个贝塞尔管，并执行贝塞尔管配件以产生贝塞尔管配件的结果; 根据Bezier管使多个图像数据变形或者用于生成多个变形图像数据的Bezier管接头的结果; 以及对所述多个变形图像数据进行平均以产生特征保存的平均图像数据。 本发明还提供了一种用于实现图像处理方法的图像处理系统，计算机可读存储介质和计算机程序产品。

公开(公告)号：US20110042729A1

公开(公告)日：2011-02-24

申请号：US12545705

申请日：2009-08-21

Applicant: Kuan-Yu Chen ,  Hsien-Hsin Lin ,  Chun-Feng Nieh ,  Hsueh-Chang Sung ,  Chien-Chang Su ,  Tsz-Mei Kwok

Inventor： Kuan-Yu Chen ,  Hsien-Hsin Lin ,  Chun-Feng Nieh ,  Hsueh-Chang Sung ,  Chien-Chang Su ,  Tsz-Mei Kwok

IPC: H01L29/78 ,  H01L21/336 ,  H01L21/8238

CPC classification number: H01L29/66477 ,  H01L21/31116 ,  H01L21/31155 ,  H01L21/823807 ,  H01L21/823814 ,  H01L27/092 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7848

Abstract: The present disclosure provides a method of fabricating a semiconductor device that includes providing a semiconductor substrate, forming a gate structure over the substrate, forming a material layer over the substrate and the gate structure, implanting Ge, C, P, F, or B in the material layer, removing portions of the material layer overlying the substrate at either side of the gate structure, forming recesses in the substrate at either side of the gate structure, and depositing a semiconductor material in the recesses by an expitaxy process.

Abstract translation: 本公开提供一种制造半导体器件的方法，其包括提供半导体衬底，在衬底上形成栅极结构，在衬底上形成材料层和栅极结构，将Ge，C，P，F或B注入 所述材料层，去除所述栅极结构的任一侧上覆盖所述衬底的所述材料层的部分，在所述栅极结构的任一侧上在所述衬底中形成凹陷，以及通过开晶过程在所述凹部中沉积半导体材料。