公开(公告)号：US08378993B2

公开(公告)日：2013-02-19

申请号：US12683439

申请日：2010-01-07

Applicant: Ling Li ,  Ying-Hui Chen ,  Chia-Lin Liu

Inventor： Ling Li ,  Ying-Hui Chen ,  Chia-Lin Liu

IPC: G06F3/045

CPC classification number: G06F3/044 ,  G02F1/13338 ,  G02F1/133514

Abstract: A capacitive touch display panel includes a first substrate, a second substrate, an opaque pattern, a plurality of transparent conductive sensor pads, and a plurality of non-transparent conductive patterns. The first substrate and the second substrate are disposed oppositely. The transparent conductive sensor pads are disposed on the second substrate. The non-transparent conductive patterns are disposed on the second substrate, and the non-transparent conductive patterns and the transparent conductive sensor pads are electrically connected and overlapping. The conductivity of the non-transparent conductive patterns is higher than that of the transparent conductive sensor pads, and the non-transparent conductive patterns are corresponding to the opaque pattern.

Abstract translation: 电容触摸显示面板包括第一基板，第二基板，不透明图案，多个透明导电传感器焊盘和多个不透明导电图案。 第一基板和第二基板相对设置。 透明导电传感器焊盘设置在第二基板上。 非透明导电图案设置在第二基板上，并且不透明导电图案和透明导电传感器垫片电连接和重叠。 不透明导电图案的导电率高于透明导电传感器焊盘的导电性，并且不透明导电图案对应于不透明图案。

公开(公告)号：US20130027438A1

公开(公告)日：2013-01-31

申请号：US13241193

申请日：2011-09-22

Applicant: Ming-Hung Hu ,  Ying-Hui Chen ,  Kuang-Hung Chien

Inventor： Ming-Hung Hu ,  Ying-Hui Chen ,  Kuang-Hung Chien

IPC: G09G5/10

CPC classification number: G09G3/3413 ,  G09G2310/0235 ,  G09G2320/041 ,  G09G2320/064 ,  G09G2320/0666 ,  G09G2320/0693 ,  G09G2330/026 ,  G09G2360/145

Abstract: A white balance calibration method includes providing red light, green light, blue light, and white light to a display panel according to first image data; detecting a first temperature of a backlight module when the backlight module provides the red light, green light, blue light, and white light to the display panel; detecting whether luminance of white light of each pixel is lower than maximum luminance of a white light emitting diode (LED) corresponding to the pixel when a first difference between the first temperature and a standard temperature stored in a lookup table is less than a predetermined value; controlling the backlight module to turn on a red LED, a green LED, and a blue LED corresponding to the pixel during turning-on of the white light if the luminance of the white light is lower than the maximum luminance of the white LED corresponding to the pixel.

Abstract translation: 白平衡校准方法包括根据第一图像数据向显示面板提供红光，绿光，蓝光和白光; 当背光模块向显示面板提供红光，绿光，蓝光和白光时，检测背光模块的第一温度; 当存储在查找表中的第一温度和标准温度之间的第一差小于预定值时，检测每个像素的白光的亮度是否低于与像素对应的白色发光二极管（LED）的最大亮度 ; 如果白光的亮度低于对应于白光的白光LED的最大亮度，则控制背光模块在白光打开期间打开与像素对应的红色LED，绿色LED和蓝色LED 像素。

公开(公告)号：US08247277B2

公开(公告)日：2012-08-21

申请号：US13366269

申请日：2012-02-04

Applicant: Huang-Chung Cheng ,  Ta-Chuan Liao ,  Sheng-Kai Chen ,  Ying-Hui Chen ,  Chi-Neng Mo

Inventor： Huang-Chung Cheng ,  Ta-Chuan Liao ,  Sheng-Kai Chen ,  Ying-Hui Chen ,  Chi-Neng Mo

IPC: H01L21/00 ,  H01L21/84

CPC classification number: H01L29/78696 ,  H01L21/28282 ,  H01L21/84 ,  H01L27/11568 ,  H01L27/1203 ,  H01L29/4234 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/6675 ,  H01L29/66833 ,  H01L29/792

Abstract: A manufacturing method of a thin film transistor is provided. An insulating pattern layer having at least one protrusion is formed on a substrate. At least one spacer and a plurality of amorphous semiconductor patterns separated from each other are formed on the insulating pattern layer. The spacer is formed at one side of the protrusion and connected between the amorphous semiconductor patterns. The spacer and the amorphous semiconductor patterns are crystallized. The protrusion and the insulating pattern layer below the spacer are removed so that a beam structure having a plurality of corners is formed and suspended over the substrate. A carrier tunneling layer, a carrier trapping layer and a carrier blocking layer are sequentially formed to compliantly wrap the corners of the beam structure. Hereafter, a gate is formed on the substrate to cover the beam structure and wrap the carrier blocking layer.

Abstract translation: 提供了薄膜晶体管的制造方法。 在基板上形成具有至少一个突起的绝缘图案层。 在绝缘图案层上形成有至少一个间隔物和彼此分离的多个非晶半导体图案。 间隔件形成在突起的一侧并连接在非晶半导体图案之间。 间隔物和非晶半导体图案结晶。 去除间隔物下面的突起和绝缘图案层，从而形成具有多个拐角的束结构并悬挂在基底上。 顺序地形成载流子隧道层，载流子俘获层和载流子阻挡层，以柔顺包裹波束结构的角部。 此后，在基板上形成栅极以覆盖光束结构并包裹载流子阻挡层。

公开(公告)号：US20120135571A1

公开(公告)日：2012-05-31

申请号：US13366269

申请日：2012-02-04

Applicant: Huang-Chung Cheng ,  Ta-Chuan Liao ,  Sheng-Kai Chen ,  Ying-Hui Chen ,  Chi-Neng Mo

Inventor： Huang-Chung Cheng ,  Ta-Chuan Liao ,  Sheng-Kai Chen ,  Ying-Hui Chen ,  Chi-Neng Mo

IPC: H01L21/336

CPC classification number: H01L29/78696 ,  H01L21/28282 ,  H01L21/84 ,  H01L27/11568 ,  H01L27/1203 ,  H01L29/4234 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/6675 ,  H01L29/66833 ,  H01L29/792

Abstract: A manufacturing method of a thin film transistor is provided. An insulating pattern layer having at least one protrusion is formed on a substrate. At least one spacer and a plurality of amorphous semiconductor patterns separated from each other are formed on the insulating pattern layer. The spacer is formed at one side of the protrusion and connected between the amorphous semiconductor patterns. The spacer and the amorphous semiconductor patterns are crystallized. The protrusion and the insulating pattern layer below the spacer are removed so that a beam structure having a plurality of corners is formed and suspended over the substrate. A carrier tunneling layer, a carrier trapping layer and a carrier blocking layer are sequentially formed to compliantly wrap the corners of the beam structure. Hereafter, a gate is formed on the substrate to cover the beam structure and wrap the carrier blocking layer.

Abstract translation: 提供了薄膜晶体管的制造方法。 在基板上形成具有至少一个突起的绝缘图案层。 在绝缘图案层上形成有至少一个间隔物和彼此分离的多个非晶半导体图案。 间隔件形成在突起的一侧并连接在非晶半导体图案之间。 间隔物和非晶半导体图案结晶。 去除间隔物下面的突起和绝缘图案层，从而形成具有多个拐角的束结构并悬挂在基底上。 顺序地形成载流子隧道层，载流子俘获层和载流子阻挡层，以柔顺包裹波束结构的角部。 此后，在基板上形成栅极以覆盖光束结构并包裹载流子阻挡层。

公开(公告)号：US20130069537A1

公开(公告)日：2013-03-21

申请号：US13345707

申请日：2012-01-07

Applicant: BO-JHANG SUN ,  Ying-hui Chen ,  Chin-hai Huang ,  Huan-ting Zhou ,  Ming-hung Hu

Inventor： BO-JHANG SUN ,  Ying-hui Chen ,  Chin-hai Huang ,  Huan-ting Zhou ,  Ming-hung Hu

IPC: H05B37/02

CPC classification number: G09G3/3233 ,  G09G3/3291 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/0262 ,  G09G2320/0223 ,  G09G2320/043

Abstract: The disclosure relates to a pixel circuit which includes an LED, a storage capacitor, a driving transistor, and first to third switching transistors. The driving transistor is utilized to control connection/disconnection between a power supply voltage and the LED. The first switching transistor receives a first scanning signal for controlling connection/disconnection between a gate of the driving transistor and the power supply voltage. The second switching transistor receives a second scanning signal for controlling connection/disconnection between the storage capacity and a ground voltage. The third switching transistor receives the first scanning signal for controlling connection/disconnection between the storage capacity and a data voltage. The first scanning signal and the second scanning signal are in antiphase to each other. A driving method thereof is also disclosed.

Abstract translation: 本发明涉及包括LED，存储电容器，驱动晶体管和第一至第三开关晶体管的像素电路。 驱动晶体管用于控制电源电压和LED之间的连接/断开。 第一开关晶体管接收用于控制驱动晶体管的栅极与电源电压之间的连接/断开的第一扫描信号。 第二开关晶体管接收用于控制存储容量与接地电压之间的连接/断开的第二扫描信号。 第三开关晶体管接收用于控制存储容量与数据电压之间的连接/断开的第一扫描信号。 第一扫描信号和第二扫描信号彼此反相。 还公开了其驱动方法。

公开(公告)号：US20110122106A1

公开(公告)日：2011-05-26

申请号：US12716275

申请日：2010-03-03

Applicant: Ling Li ,  Shian-Jun Chiou ,  Ying-Hui Chen ,  Chi-Neng Mo

Inventor： Ling Li ,  Shian-Jun Chiou ,  Ying-Hui Chen ,  Chi-Neng Mo

IPC: G09G5/00 ,  G09G3/36

CPC classification number: G09G3/3648 ,  G09G2310/0251 ,  G09G2320/0285 ,  G09G2340/16 ,  G09G2360/16

Abstract: A liquid crystal display device includes a plurality of gate lines, a plurality of data lines, a pixel array, a gate driver, a timing controller, and an optimization circuit. Each pixel unit in the pixel array displays images according to the gate driving signal received from a corresponding gate line and the data driving signal received from a corresponding data line. According to an optimized reference value, the timing controller provides an output enable signal, based on which the gate driver outputs the gate driving signals. The optimization circuit receives a first grayscale data related to display images of a row of pixel units in a first driving period and a second grayscale data related to display images of the row of pixel units in a second driving period, and provides the optimized reference value according the difference between the first and second grayscale data.

Abstract translation: 液晶显示装置包括多条栅极线，多条数据线，像素阵列，栅极驱动器，定时控制器和优化电路。 像素阵列中的每个像素单元根据从对应的栅极线接收的栅极驱动信号和从相应的数据线接收的数据驱动信号来显示图像。 根据优化的参考值，定时控制器提供输出使能信号，基于该输出使能信号，栅极驱动器输出栅极驱动信号。 优化电路在第二驱动周期中接收与第一驱动周期中的一行像素单元的显示图像相关的第一灰度数据和与第二驱动周期中的该像素单元的显示图像相关的第二灰度数据，并且提供优化的参考值 根据第一和第二灰度数据之间的差异。

公开(公告)号：US20110084283A1

公开(公告)日：2011-04-14

申请号：US12686357

申请日：2010-01-12

Applicant: Huang-Chung Cheng ,  Ta-Chuan Liao ,  Sheng-Kai Chen ,  Ying-Hui Chen ,  Chi-Neng Mo

Inventor： Huang-Chung Cheng ,  Ta-Chuan Liao ,  Sheng-Kai Chen ,  Ying-Hui Chen ,  Chi-Neng Mo

IPC: H01L29/786 ,  H01L21/336

CPC classification number: H01L29/78696 ,  H01L21/28282 ,  H01L21/84 ,  H01L27/11568 ,  H01L27/1203 ,  H01L29/4234 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/6675 ,  H01L29/66833 ,  H01L29/792

Abstract: A thin film transistor and a manufacturing method thereof are provided. An insulating pattern layer having at least one protrusion is formed on a substrate. Afterwards, at least one spacer and a plurality of amorphous semiconductor patterns separated from each other are formed on the insulating pattern layer. The spacer is formed at one side of the protrusion and connected between the amorphous semiconductor patterns. Later, the spacer and the amorphous semiconductor patterns are crystallized. Subsequently, the protrusion and the insulating pattern layer below the spacer are removed so that a beam structure having a plurality of corners is formed and suspended over the substrate. Then, a carrier tunneling layer, a carrier trapping layer and a carrier blocking layer are sequentially formed to compliantly wrap the corners of the beam structure. Hereafter, a gate is formed on the substrate to cover the beam structure and wrap the carrier blocking layer.

Abstract translation: 提供薄膜晶体管及其制造方法。 在基板上形成具有至少一个突起的绝缘图案层。 之后，绝缘图案层上形成有至少一个间隔物和多个彼此分离的非晶半导体图案。 间隔件形成在突起的一侧并连接在非晶半导体图案之间。 之后，间隔物和非晶半导体图案结晶。 随后，去除间隔物下面的突起和绝缘图案层，使得形成具有多个拐角的束结构并悬浮在基底上。 然后，顺序地形成载流子隧道层，载流子俘获层和载流子阻挡层，从而柔顺包裹梁结构的角部。 此后，在基板上形成栅极以覆盖光束结构并包裹载流子阻挡层。

公开(公告)号：US20060214954A1

公开(公告)日：2006-09-28

申请号：US11089828

申请日：2005-03-24

Applicant: Ying-Hui Chen ,  Wen-Hsiung Liu

Inventor： Ying-Hui Chen ,  Wen-Hsiung Liu

IPC: G09G5/10

CPC classification number: G09G3/006 ,  G09G3/3611

Abstract: A method of adjusting the brightness of a display device is provided. The method includes providing a plurality of saturated level-adjust voltages to various level adjustments of the display device when the central brightness is saturated. Then, a computation of the saturated level-adjust voltage of each level adjustment is carried out to obtain a display voltage of each level adjustment. Thereafter, a computation of the saturated level-adjust voltage, a common voltage and the display voltage of each level adjustment is carried out to obtain a feed-through voltage for each level adjustment. After that, a computation of the feed-through voltage and the saturated level-adjust voltage of each level adjustment is carried out to obtain a liquid crystal capacitance value for each level adjustment. Finally, a simulation of the liquid crystal capacitance value of each level adjustment is carried out to obtain an optimized level-adjust voltage for each level adjustment.

Abstract translation: 提供了一种调节显示装置的亮度的方法。 该方法包括当中心亮度饱和时，向显示装置的各种电平调整提供多个饱和电平调整电压。 然后，进行各电平调整的饱和电平调整电压的计算，得到各电平调整的显示电压。 此后，进行各电平调整的饱和电平调整电压，公共电压和显示电压的计算，以获得每个电平调整的馈通电压。 之后，进行各电平调整的馈通电压和饱和电平调整电压的计算，得到每个电平调整的液晶电容值。 最后，进行各电平调整的液晶电容值的模拟，以获得每个电平调整的优化电平调整电压。

公开(公告)号：US08325123B2

公开(公告)日：2012-12-04

申请号：US12716275

申请日：2010-03-03

Applicant: Ling Li ,  Shian-Jun Chiou ,  Ying-Hui Chen ,  Chi-Neng Mo

Inventor： Ling Li ,  Shian-Jun Chiou ,  Ying-Hui Chen ,  Chi-Neng Mo

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G09G2310/0251 ,  G09G2320/0285 ,  G09G2340/16 ,  G09G2360/16

Abstract: A liquid crystal display device includes a plurality of gate lines, a plurality of data lines, a pixel array, a gate driver, a timing controller, and an optimization circuit. Each pixel unit in the pixel array displays images according to the gate driving signal received from a corresponding gate line and the data driving signal received from a corresponding data line. According to an optimized reference value, the timing controller provides an output enable signal, based on which the gate driver outputs the gate driving signals. The optimization circuit receives a first grayscale data related to display images of a row of pixel units in a first driving period and a second grayscale data related to display images of the row of pixel units in a second driving period, and provides the optimized reference value according the difference between the first and second grayscale data.

Abstract translation: 液晶显示装置包括多条栅极线，多条数据线，像素阵列，栅极驱动器，定时控制器和优化电路。 像素阵列中的每个像素单元根据从对应的栅极线接收的栅极驱动信号和从相应的数据线接收的数据驱动信号来显示图像。 根据优化的参考值，定时控制器提供输出使能信号，基于该输出使能信号，栅极驱动器输出栅极驱动信号。 优化电路在第二驱动周期中接收与第一驱动周期中的一行像素单元的显示图像相关的第一灰度数据和与第二驱动周期中的该像素单元的显示图像相关的第二灰度数据，并且提供优化的参考值 根据第一和第二灰度数据之间的差异。

公开(公告)号：US20120248431A1

公开(公告)日：2012-10-04

申请号：US13183838

申请日：2011-07-15

Applicant: Ya-Huei HUANG ,  Kuan-Yu Chen ,  Ying-Hui Chen ,  Te-Yu Chen

Inventor： Ya-Huei HUANG ,  Kuan-Yu Chen ,  Ying-Hui Chen ,  Te-Yu Chen

IPC: H01L29/786

CPC classification number: H01L27/1225

Abstract: A transistor array substrate includes a substrate, a plurality of scan lines, a plurality of data lines and a plurality of pixel units. The scan lines and the data lines are all disposed on the substrate. Each pixel unit includes a transistor and a pixel electrode. The transistor is electrically connected to the pixel electrodes, the scan lines and the data lines. Each transistor includes a gate, a drain, a source, a metal-oxide-semiconductor layer and a channel protective layer. A channel gap exists between the drain and the source. The metal-oxide-semiconductor layer has a pair of side edges opposite to each other and the side edges are located at two ends of the channel gap. The channel protective layer covers the metal-oxide-semiconductor layer in the channel gap and protrudes from the side edges of the metal-oxide-semiconductor layer.

Abstract translation: 晶体管阵列基板包括基板，多条扫描线，多条数据线和多个像素单元。 扫描线和数据线都设置在基板上。 每个像素单元包括晶体管和像素电极。 晶体管电连接到像素电极，扫描线和数据线。 每个晶体管包括栅极，漏极，源极，金属氧化物半导体层和沟道保护层。 漏极和源极之间存在沟道间隙。 金属氧化物半导体层具有彼此相对的一对侧边缘，并且侧边缘位于沟道间隙的两端。 沟道保护层覆盖沟道间隙中的金属氧化物半导体层，并从金属氧化物半导体层的侧边缘突出。