公开(公告)号：US06893928B2

公开(公告)日：2005-05-17

申请号：US10390046

申请日：2003-03-18

申请人： Tsutomu Sato ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Toshihiko Iinuma ,  Kiyotaka Miyano

发明人： Tsutomu Sato ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Toshihiko Iinuma ,  Kiyotaka Miyano

IPC分类号： H01L29/78 ,  H01L21/324 ,  H01L21/336 ,  H01L21/762 ,  H01L29/06 ,  H01L29/786

CPC分类号： H01L29/66583 ,  H01L21/324 ,  H01L21/76229 ,  H01L21/76232 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0657 ,  H01L29/42356 ,  H01L29/66651 ,  H01L29/78 ,  H01L29/7831 ,  H01L29/78639

摘要： To provide a cavity in the portion of the silicon substrate which lies beneath the channel region of the MOS transistor.

摘要翻译： 在硅衬底的位于MOS晶体管的沟道区之下的部分提供空腔。

公开(公告)号：US06891232B2

公开(公告)日：2005-05-10

申请号：US10354094

申请日：2003-01-30

申请人： Kiyotaka Miyano ,  Kazuya Ohuchi ,  Ichiro Mizushima

发明人： Kiyotaka Miyano ,  Kazuya Ohuchi ,  Ichiro Mizushima

IPC分类号： H01L29/78 ,  H01L21/20 ,  H01L21/336 ,  H01L29/94 ,  H01L29/76

CPC分类号： H01L29/66628

摘要： A semiconductor device comprises: a semiconductor substrate; a gate insulating film formed on the top surface of the semiconductor substrate; a gate electrode formed on the gate insulating film; diffusion layers formed in the semiconductor substrate to be used a source layer and a drain layer; and a silicide layer formed to overlie the diffusion layers; wherein an oxygen concentration peak, where oxygen concentration is maximized, is at a level lower than said top surface in a cross-section taken along a plane perpendicular to said top surface.

摘要翻译： 半导体器件包括：半导体衬底; 形成在所述半导体衬底的顶表面上的栅极绝缘膜; 形成在栅极绝缘膜上的栅电极; 在半导体衬底中形成的扩散层用作源极层和漏极层; 以及形成为覆盖所述扩散层的硅化物层; 其中氧浓度最大的氧浓度峰在垂直于所述顶表面的平面截取的横截面中处于比所述顶表面低的水平。

公开(公告)号：US06395621B1

公开(公告)日：2002-05-28

申请号：US09998642

申请日：2001-12-03

申请人： Ichiro Mizushima ,  Yuichiro Mitani ,  Shigeru Kambayashi ,  Kiyotaka Miyano

发明人： Ichiro Mizushima ,  Yuichiro Mitani ,  Shigeru Kambayashi ,  Kiyotaka Miyano

IPC分类号： H01L2120

CPC分类号： H01L21/02667 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/2022 ,  H01L29/665 ,  H01L29/66628

摘要： A process is provided with which amorphous silicon or polysilicon is deposited on a semiconductor substrate. Then, a low-temperature solid phase growth method is employed to selectively form amorphous silicon or polysilicon into single crystal silicon on only an exposed portion of the semiconductor substrate. A step for manufacturing an epitaxial silicon substrate a exhibiting a high manufacturing yield, a low cost and high quality can be employed in a process for manufacturing a semiconductor device incorporating a shrinked MOS transistor. Specifically, a silicon oxide layer having a thickness which is not larger than the mono-molecular layer is formed on the silicon substrate. Then, an amorphous silicon layer is deposited on the silicon oxide layer in a low-temperature region to perform annealing in the low-temperature region. Thus, the amorphous silicon layer is changed into a single crystal owing to solid phase growth. Thus, a silicon epitaxial single crystal layer exhibiting high quality is formed on the silicon substrate. The present invention is suitable as a process for manufacturing a high-speed and high degree of integration of a semiconductor device having an elevated source/drain structure and a SALICIDE structure.

摘要翻译： 提供了在半导体衬底上沉积非晶硅或多晶硅的工艺。 然后，采用低温固相生长方法，仅在半导体衬底的暴露部分上选择性地形成非晶硅或多晶硅为单晶硅。 用于制造具有高制造成本，低成本和高质量的外延硅衬底的步骤可用于制造包含收缩MOS晶体管的半导体器件的工艺。 具体地说，在硅衬底上形成厚度不大于单分子层的氧化硅层。 然后，在低温区域的氧化硅层上沉积非晶硅层，以在低温区域进行退火。 因此，由于固相生长，非晶硅层变为单晶。 因此，在硅衬底上形成表现出高质量的硅外延单晶层。 本发明适用于制造具有升高的源/漏结构和SALICIDE结构的半导体器件的高速和高度集成的方法。

公开(公告)号：US06335251B1

公开(公告)日：2002-01-01

申请号：US09824215

申请日：2001-04-03

申请人： Kiyotaka Miyano ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Tomohiro Saito

发明人： Kiyotaka Miyano ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Tomohiro Saito

IPC分类号： H01L21336

摘要： A semiconductor apparatus on which a MOS transistor having an elevated source and drain structure is formed is arranged to have a gate electrode which is formed on the surface of a silicon substrate through an insulating film. An elevated source film and an elevated drain film each having at least a surface portion constituted by a metal silicide film, being conductive and elevated over the surface of the silicon substrate are formed on a source region and a drain region on the surface of the silicon substrate. Thus, a MOS transistor having a structure in which the surfaces of the source region and the drain region are elevated over the surface of the silicon substrate is formed. A first gate-side-wall insulating film is formed on the side wall of the gate electrode of the MOS transistor and having a bottom surface formed apart from the surface of the silicon substrate. A second gate-side-wall insulating film is formed between the first gate-side-wall insulating film and the gate electrode and on the bottom surface of the first gate-side-wall insulating film. The portion formed on the bottom surface exists in an inner bottom surface portion of the bottom surface of the first gate-sidewall insulating film adjacent to the gate electrode. The elevated source film and the elevated drain film are free from any facet in portions made contact with the first gate-side-wall insulating film.

公开(公告)号：US6162741A

公开(公告)日：2000-12-19

申请号：US982416

申请日：1997-12-02

申请人： Yasushi Akasaka ,  Kazuaki Nakajima ,  Kiyotaka Miyano ,  Kyoichi Suguro

发明人： Yasushi Akasaka ,  Kazuaki Nakajima ,  Kiyotaka Miyano ,  Kyoichi Suguro

IPC分类号： H01L29/43 ,  H01L21/28 ,  H01L21/3205 ,  H01L21/336 ,  H01L21/60 ,  H01L21/768 ,  H01L23/52 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H01L21/8232

CPC分类号： H01L21/28247 ,  H01L21/28061 ,  H01L21/32051 ,  H01L21/76834 ,  H01L21/76885 ,  H01L21/76897 ,  H01L29/4941 ,  H01L29/6656 ,  H01L29/6659 ,  H01L2924/0002 ,  H01L2924/00

摘要： According to the manufacturing method of the semiconductor device of the present invention, an oxide film is formed on a metal film formed on a main surface of a semiconductor substrate by exposing the metal film to the oxidizing gas. The oxide film is then reduced in a reducing atmosphere, and a protection film is formed on the surface of the metal film reduced in the reducing step. In this manner, the damage to the surface of the metal film can be prevented.

摘要翻译： 根据本发明的半导体器件的制造方法，通过将金属膜暴露于氧化气体，在形成于半导体基板的主面上的金属膜上形成氧化膜。 然后在还原气氛中还原氧化膜，并且在还原步骤中还原的金属膜的表面上形成保护膜。 以这种方式，可以防止对金属膜的表面的损坏。