公开(公告)号：US06232641B1

公开(公告)日：2001-05-15

申请号：US09321846

申请日：1999-05-28

申请人： Kiyotaka Miyano ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Tomohiro Saito

发明人： Kiyotaka Miyano ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Tomohiro Saito

IPC分类号： H01L31119

CPC分类号： H01L29/66628 ,  H01L29/66545

摘要： A semiconductor apparatus on which a MOS transistor having an elevated source and drain structure is formed is arranged to have a gate electrode which is formed on the surface of a silicon substrate through an insulating film. An elevated source film and an elevated drain film each having at least a surface portion constituted by a metal silicide film, being conductive and elevated over the surface of the silicon substrate are formed on a source region and a drain region on the surface of the silicon substrate. Thus, a MOS transistor having a structure in which the surfaces of the source region and the drain region are elevated over the surface of the silicon substrate is formed. A first gate-side-wall insulating film is formed on the side wall of the gate electrode of the MOS transistor and having a bottom surface formed apart from the surface of the silicon substrate. A second gate-side-wall insulating film is formed between the first gate-side-wall insulating film and the gate electrode and on the bottom surface of the first gate-side-wall insulating film. The portion formed on the bottom surface exists in an inner bottom surface portion of the bottom surface of the first gate-side-wall insulating film adjacent to the gate electrode. The elevated source film and the elevated drain film are free from any facet in portions made contact with the first gate-side-wall insulating film.

摘要翻译： 形成具有升高的源极和漏极结构的MOS晶体管的半导体器件被布置成具有通过绝缘膜形成在硅衬底的表面上的栅电极。 在硅的表面上的源极区域和漏极区域上形成有在硅衬底的表面上导电且升高的至少一层由金属硅化物膜构成的表面部分的升高的源极膜和升高的漏极膜 基质。 因此，形成具有使源极区域和漏极区域的表面在硅衬底的表面上升高的结构的MOS晶体管。 第一栅极侧壁绝缘膜形成在MOS晶体管的栅电极的侧壁上，并且具有与硅衬底的表面分开形成的底表面。 在第一栅极侧壁绝缘膜和栅电极之间以及第一栅极侧壁绝缘膜的底面上形成第二栅极侧壁绝缘膜。 形成在底表面上的部分存在于与栅电极相邻的第一栅极侧壁绝缘膜的底表面的内底表面部分中。 升高的源极膜和升高的漏极膜在与第一栅极侧壁绝缘膜接触的部分中没有任何刻面。

公开(公告)号：US06335251B1

公开(公告)日：2002-01-01

申请号：US09824215

申请日：2001-04-03

申请人： Kiyotaka Miyano ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Tomohiro Saito

发明人： Kiyotaka Miyano ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Tomohiro Saito

IPC分类号： H01L21336

摘要： A semiconductor apparatus on which a MOS transistor having an elevated source and drain structure is formed is arranged to have a gate electrode which is formed on the surface of a silicon substrate through an insulating film. An elevated source film and an elevated drain film each having at least a surface portion constituted by a metal silicide film, being conductive and elevated over the surface of the silicon substrate are formed on a source region and a drain region on the surface of the silicon substrate. Thus, a MOS transistor having a structure in which the surfaces of the source region and the drain region are elevated over the surface of the silicon substrate is formed. A first gate-side-wall insulating film is formed on the side wall of the gate electrode of the MOS transistor and having a bottom surface formed apart from the surface of the silicon substrate. A second gate-side-wall insulating film is formed between the first gate-side-wall insulating film and the gate electrode and on the bottom surface of the first gate-side-wall insulating film. The portion formed on the bottom surface exists in an inner bottom surface portion of the bottom surface of the first gate-sidewall insulating film adjacent to the gate electrode. The elevated source film and the elevated drain film are free from any facet in portions made contact with the first gate-side-wall insulating film.

公开(公告)号：US20080224252A1

公开(公告)日：2008-09-18

申请号：US12068635

申请日：2008-02-08

申请人： Kyoichi Suguro ,  Kiyotaka Miyano ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Takayuki Hiraoka ,  Yasushi Akasaka ,  Tsunetoshi Arikado

发明人： Kyoichi Suguro ,  Kiyotaka Miyano ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Takayuki Hiraoka ,  Yasushi Akasaka ,  Tsunetoshi Arikado

IPC分类号： H01L29/00

CPC分类号： H01L21/28194 ,  H01L21/28088 ,  H01L21/28167 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/76262 ,  H01L21/823481 ,  H01L29/511 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66537 ,  H01L29/66545

摘要： In using an epitaxial growth method to selectively grow on a silicon substrate an epitaxial layer on which an element is to be formed, the epitaxial layer is formed so as to extend upward above a thermal oxide film that is an element isolating insulating film, in order to prevent formation of facets. Subsequently, unwanted portions of the epitaxial layer are removed by means of CMP to complete an STI element isolating structure.

摘要翻译： 在使用外延生长方法选择性地在硅衬底上生长其上要形成元素的外延层时，形成外延层，以便在作为元件隔离绝缘膜的热氧化膜上方向上延伸， 以防止形成小平面。 随后，通过CMP去除外延层的不需要的部分以完成STI元件隔离结构。

公开(公告)号：US06989316B2

公开(公告)日：2006-01-24

申请号：US10406281

申请日：2003-04-04

申请人： Kyoichi Suguro ,  Kiyotaka Miyano ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Takayuki Hiraoka ,  Yasushi Akasaka ,  Tsunetoshi Arikado

发明人： Kyoichi Suguro ,  Kiyotaka Miyano ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Takayuki Hiraoka ,  Yasushi Akasaka ,  Tsunetoshi Arikado

IPC分类号： H01L21/20

CPC分类号： H01L21/28194 ,  H01L21/28088 ,  H01L21/28167 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/76262 ,  H01L21/823481 ,  H01L29/511 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66537 ,  H01L29/66545

摘要： In using an epitaxial growth method to selectively grow on a silicon substrate an epitaxial layer on which an element is to be formed, the epitaxial layer is formed so as to extend upward above a thermal oxide film that is an element isolating insulating film, in order to prevent formation of facets. Subsequently, unwanted portions of the epitaxial layer are removed by means of CMP to complete an STI element isolating structure.

公开(公告)号：US06617226B1

公开(公告)日：2003-09-09

申请号：US09609107

申请日：2000-06-30

申请人： Kyoioni Suguro ,  Kiyotaka Miyano ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Takayuki Hiraoka ,  Yasushi Akasaka ,  Tsunetoshi Arikado

发明人： Kyoioni Suguro ,  Kiyotaka Miyano ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Takayuki Hiraoka ,  Yasushi Akasaka ,  Tsunetoshi Arikado

IPC分类号： H01L2120

CPC分类号： H01L21/28194 ,  H01L21/28088 ,  H01L21/28167 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/76262 ,  H01L21/823481 ,  H01L29/511 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66537 ,  H01L29/66545

摘要： In using an epitaxial growth method to selectively grow on a silicon substrate an epitaxial layer on which an element is to be formed, the epitaxial layer is formed so as to extend upward above a thermal oxide film that is an element isolating insulating film, in order to prevent formation of facets. Subsequently, unwanted portions of the epitaxial layer are removed by means of CMP to complete an STI element isolating structure.

摘要翻译： 在使用外延生长方法选择性地在硅衬底上生长其上要形成元素的外延层时，形成外延层，以便在作为元件隔离绝缘膜的热氧化膜上方向上延伸， 以防止形成小平面。 随后，通过CMP去除外延层的不需要的部分以完成STI元件隔离结构。

公开(公告)号：US07772671B2

公开(公告)日：2010-08-10

申请号：US12068635

申请日：2008-02-08

申请人： Kyoichi Suguro ,  Kiyotaka Miyano ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Takayuki Hiraoka ,  Yasushi Akasaka ,  Tsunetoshi Arikado

发明人： Kyoichi Suguro ,  Kiyotaka Miyano ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Takayuki Hiraoka ,  Yasushi Akasaka ,  Tsunetoshi Arikado

IPC分类号： H01L29/00

CPC分类号： H01L21/28194 ,  H01L21/28088 ,  H01L21/28167 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/76262 ,  H01L21/823481 ,  H01L29/511 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66537 ,  H01L29/66545

摘要： A semiconductor device including a semiconductor substrate having on its surface a recess and at least one projection formed in the recess. The projection has a channel region and an element isolating insulating film is formed in the recess. A MIS type semiconductor element is formed on the semiconductor substrate and includes a gate electrode formed on the channel region of the projection via a gate insulating film. Source and drain regions are formed to pinch the channel region of the projection therebetween. A channel region of the MIS type semiconductor element is formed to reach the at least one projection located adjacent to the MIS type semiconductor element in its channel width direction via the recess. A top surface of the at least one projection is located higher than the top surface of the element isolating insulating film by 20 nm or more.

摘要翻译： 一种半导体器件，包括在其表面上具有凹部的半导体衬底和形成在凹部中的至少一个突起。 突起具有沟道区域，并且在凹部中形成元件隔离绝缘膜。 MIS半导体元件形成在半导体衬底上，并且包括通过栅极绝缘膜形成在突起的沟道区上的栅电极。 形成源区和漏区以夹住其间的突起的沟道区。 MIS型半导体元件的沟道区域形成为经由凹部在其沟道宽度方向上到达位于与MIS型半导体元件相邻的至少一个突起。 所述至少一个突起的顶表面比所述元件隔离绝缘膜的顶表面高20nm或更大。

公开(公告)号：US06893928B2

公开(公告)日：2005-05-17

申请号：US10390046

申请日：2003-03-18

申请人： Tsutomu Sato ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Toshihiko Iinuma ,  Kiyotaka Miyano

发明人： Tsutomu Sato ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Toshihiko Iinuma ,  Kiyotaka Miyano

IPC分类号： H01L29/78 ,  H01L21/324 ,  H01L21/336 ,  H01L21/762 ,  H01L29/06 ,  H01L29/786

CPC分类号： H01L29/66583 ,  H01L21/324 ,  H01L21/76229 ,  H01L21/76232 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0657 ,  H01L29/42356 ,  H01L29/66651 ,  H01L29/78 ,  H01L29/7831 ,  H01L29/78639

摘要： To provide a cavity in the portion of the silicon substrate which lies beneath the channel region of the MOS transistor.

摘要翻译： 在硅衬底的位于MOS晶体管的沟道区之下的部分提供空腔。

公开(公告)号：US06570217B1

公开(公告)日：2003-05-27

申请号：US09296669

申请日：1999-04-22

申请人： Tsutomu Sato ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Toshihiko Iinuma ,  Kiyotaka Miyano

发明人： Tsutomu Sato ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Toshihiko Iinuma ,  Kiyotaka Miyano

IPC分类号： H01L2926

CPC分类号： H01L29/66583 ,  H01L21/324 ,  H01L21/76229 ,  H01L21/76232 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0657 ,  H01L29/42356 ,  H01L29/66651 ,  H01L29/78 ,  H01L29/7831 ,  H01L29/78639

摘要： To provide a cavity in the portion of the silicon substrate which lies beneath the channel region of the MOS transistor.

公开(公告)号：US20090233451A1

公开(公告)日：2009-09-17

申请号：US12471830

申请日：2009-05-26

申请人： Yoshitaka Tsunashima ,  Seiji Ihumiya ,  Yasumasa Suizu ,  Yoshio Ozawa ,  Kiyotaka Miyano ,  Masayuki Tanaka

发明人： Yoshitaka Tsunashima ,  Seiji Ihumiya ,  Yasumasa Suizu ,  Yoshio Ozawa ,  Kiyotaka Miyano ,  Masayuki Tanaka

IPC分类号： H01L21/31

CPC分类号： H01L21/82345 ,  H01L21/28088 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L21/31604 ,  H01L21/823462 ,  H01L21/823475 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/6656

摘要： Claimed and disclosed is a semiconductor device including a transistor having a gate insulating film structure containing nitrogen or fluorine in a compound, such as metal silicate, containing metal, silicon and oxygen, a gate insulating film structure having a laminated structure of an amorphous metal oxide film and metal silicate film, or a gate insulating film structure having a first gate insulating film including an oxide film of a first metal element and a second gate insulating film including a metal silicate film of a second metal element.

摘要翻译： 权利要求和公开的是一种半导体器件，包括具有在包含金属，硅和氧的金属硅酸盐的化合物中含有氮或氟的栅极绝缘膜结构的晶体管，具有非晶态金属氧化物层叠结构的栅极绝缘膜结构 膜和金属硅酸盐膜，或具有包括第一金属元素的氧化物膜的第一栅极绝缘膜和包括第二金属元素的金属硅酸盐膜的第二栅极绝缘膜的栅极绝缘膜结构。

公开(公告)号：US20080102616A1

公开(公告)日：2008-05-01

申请号：US11999958

申请日：2007-12-07

申请人： Yoshitaka Tsunashima ,  Seiji Ihumiya ,  Yasumasa Suizu ,  Yoshio Ozawa ,  Kiyotaka Miyano ,  Masayuki Tanaka

发明人： Yoshitaka Tsunashima ,  Seiji Ihumiya ,  Yasumasa Suizu ,  Yoshio Ozawa ,  Kiyotaka Miyano ,  Masayuki Tanaka

IPC分类号： H01L21/283

CPC分类号： H01L21/82345 ,  H01L21/28088 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L21/31604 ,  H01L21/823462 ,  H01L21/823475 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/6656

摘要： Claimed and disclosed is a semiconductor device including a transistor having a gate insulating film structure containing nitrogen or fluorine in a compound, such as metal silicate, containing metal, silicon and oxygen, a gate insulating film structure having a laminated structure of an amorphous metal oxide film and metal silicate film, or a gate insulating film structure having a first gate insulating film including an oxide film of a first metal element and a second gate insulating film including a metal silicate film of a second metal element.

摘要翻译： 权利要求和公开的是一种半导体器件，包括具有在包含金属，硅和氧的金属硅酸盐的化合物中含有氮或氟的栅极绝缘膜结构的晶体管，具有非晶态金属氧化物层叠结构的栅极绝缘膜结构 膜和金属硅酸盐膜，或具有包括第一金属元素的氧化物膜的第一栅极绝缘膜和包括第二金属元素的金属硅酸盐膜的第二栅极绝缘膜的栅极绝缘膜结构。