Method and system for autonomic monitoring of semaphore operation in an application
    81.
    发明授权
    Method and system for autonomic monitoring of semaphore operation in an application 失效
    应用程序中信号量操作的自主监控方法和系统

    公开(公告)号:US07421681B2

    公开(公告)日:2008-09-02

    申请号:US10682437

    申请日:2003-10-09

    IPC分类号: G06F9/44

    摘要: A method, an apparatus, and a computer program product in a data processing system are presented for using hardware assistance for gathering performance information that significantly reduces the overhead in gathering such information. Performance indicators are associated with instructions or memory locations, and processing of the performance indicators enables counting of events associated with execution of those instructions or events associated with accesses to those memory locations. The performance information that has been dynamically gathered from the assisting hardware is available to the software application during runtime in order to autonomically affect the behavior of the software application, particularly to enhance its performance. For example, the counted events may be used to autonomically collecting statistical information about the ability of a software application to successfully acquire a semaphore.

    摘要翻译: 提出了一种数据处理系统中的方法,装置和计算机程序产品,用于使用硬件辅助来收集性能信息,这显着地减少了收集这些信息的开销。 性能指标与指令或存储器位置相关联,并且性能指示符的处理使得能够对与执行与那些存储器位置的访问相关联的那些指令或事件相关联的事件进行计数。 在运行期间,从辅助硬件动态收集的性能信息可用于软件应用程序,以便自主地影响软件应用程序的行为,特别是增强其性能。 例如,计数事件可用于自动收集有关软件应用程序成功获取信号量的能力的统计信息。

    Autonomic method and apparatus for hardware assist for patching code
    82.
    发明授权
    Autonomic method and apparatus for hardware assist for patching code 有权
    用于硬件辅助的辅助方法和装置辅助代码

    公开(公告)号:US07415705B2

    公开(公告)日:2008-08-19

    申请号:US10757171

    申请日:2004-01-14

    IPC分类号: G06F9/44

    摘要: A method, apparatus and computer instructions for hardware assist for autonomically patching code. The present invention provides hardware microcode to a new type of metadata to selectively identify instructions to be patched for specific performance optimization functions. The present invention also provides a new flag in the machine status register (MSR) to enable or disable a performance monitoring application or process to perform code-patching functions. If the code patching function is enabled, the application or process may patch code at run time by associating the metadata with the selected instructions. The metadata includes pointers pointing to the patch code block code. The program code may be patched autonomically without modifying original code.

    摘要翻译: 用于硬件辅助自动修补代码的方法,装置和计算机指令。 本发明向新类型的元数据提供硬件微代码,以选择性地识别要修补的特定性能优化功能的指令。 本发明还提供了机器状态寄存器(MSR)中的新标志,以启用或禁用性能监视应用程序或进程来执行代码补丁功能。 如果启用代码补丁功能,应用程序或进程可以通过将元数据与所选指令相关联来在运行时修补代码。 元数据包括指向补丁代码块代码的指针。 程序代码可以自动修补而不修改原始代码。

    Method and apparatus for counting instruction and memory location ranges
    84.
    发明授权
    Method and apparatus for counting instruction and memory location ranges 失效
    用于计数指令和存储器位置范围的方法和装置

    公开(公告)号:US07373637B2

    公开(公告)日:2008-05-13

    申请号:US10675872

    申请日:2003-09-30

    IPC分类号: G06F9/44

    摘要: A method, apparatus, and computer instructions in a data processing system for processing instructions and monitoring accesses to memory location ranges. An instruction for execution is identified. A determination is made as to whether the instruction is within a contiguous range of instructions. Execution information relating to the instruction is identified if the instruction is within the contiguous range of instructions. With memory location accesses, an access to a memory location is identified. A determination of whether the memory location is within a contiguous range of memory locations is made. Access information is identified if the memory location is within the contiguous range of memory locations.

    摘要翻译: 数据处理系统中的方法,装置和计算机指令,用于处理指令并监视对存储器位置范围的访问。 确定执行指令。 确定指令是否在连续的指令范围内。 如果指令在指令的相邻范围内,则识别与指令相关的执行信息。 利用存储器位置访问,识别对存储器位置的访问。 确定存储器位置是否在存储器位置的连续范围内。 如果存储器位置在存储器位置的连续范围内,则识别访问信息。

    Method and system for recording events of an interrupt using pre-interrupt handler and post-interrupt handler
    85.
    发明授权
    Method and system for recording events of an interrupt using pre-interrupt handler and post-interrupt handler 有权
    使用预中断处理程序和后中断处理程序来记录中断事件的方法和系统

    公开(公告)号:US07197586B2

    公开(公告)日:2007-03-27

    申请号:US10757192

    申请日:2004-01-14

    IPC分类号: G06F13/24

    CPC分类号: G06F13/24

    摘要: A method, apparatus, and computer instructions for providing pre and post handlers to log trace records before entering or after exiting the interrupt handler. A trace record includes a ‘from’ address where the interrupt occurs or where the branch instruction is executed or a ‘to’ address for the branch to case and counts of selected performance monitoring events. A timestamp may be associated with each event. In one embodiment, the pre and post handler is used with trap on branch to log trace records prior to and immediate after taking a branch. In another embodiment, a pre handler is enabled to log trace records that occur prior to executing interrupt service routines. A post handler is enabled to log trace records that occur after the interrupt service routines is executed and prior to returning to normal execution. Resulting low-level performance trace data may be collected by the user at a later time for more structured performance analysis.

    摘要翻译: 一种方法,装置和计算机指令,用于在进入或退出中断处理程序之后提供前处理程序和后处理程序来记录跟踪记录。 跟踪记录包括发生中断的“从”地址或执行分支指令的位置,或者分支的“到”地址到所选择的性能监视事件的大小写和计数。 时间戳可能与每个事件相关联。 在一个实施例中,前处理程序和后处理程序与分支上的陷阱一起使用,以在分支之前和之后记录跟踪记录。 在另一个实施例中,预处理程序能够记录在执行中断服务程序之前发生的跟踪记录。 启用后台处理程序来记录在执行中断服务程序之后并在返回到正常执行之前发生的跟踪记录。 所得到的低级别性能跟踪数据可以由用户以后收集以进行更结构化的性能分析。

    Method and apparatus for autonomic detection of cache “chase tail” conditions and storage of instructions/data in “chase tail” data structure
    86.
    发明授权
    Method and apparatus for autonomic detection of cache “chase tail” conditions and storage of instructions/data in “chase tail” data structure 失效
    用于自动检测缓存“追尾”条件的方法和装置以及“追尾”数据结构中指令/数据的存储

    公开(公告)号:US07181599B2

    公开(公告)日:2007-02-20

    申请号:US10757256

    申请日:2004-01-14

    IPC分类号: G06F11/30

    CPC分类号: G06F12/126

    摘要: A method, apparatus, and computer instructions in a data processing system for processing instructions are provided. Instructions are received at a processor in the system. If a selected indicator is associated with the instruction, counting of each event associated with the execution of the instruction is enabled. The performance indicators and counter values may be used as a mechanism for identifying cache hits and cache misses. Performance counters are incremented each time the instructions of routines of interest are executed and each time the instructions must be reloaded into the cache. From the values of these counters the cache hit-miss ratio may be determined. When the cache hit-miss ratio becomes less than a predetermined threshold, i.e. a greater number of cache misses than cache hits, the present invention may determine that a problem condition has occurred and initiate “chase tail” operations for avoiding overwriting of entries in the cache.

    摘要翻译: 提供了用于处理指令的数据处理系统中的方法,装置和计算机指令。 系统中的处理器接收到指令。 如果所选择的指示符与指令相关联,则启用与执行指令相关联的每个事件的计数。 性能指标和计数器值可以用作识别高速缓存命中和高速缓存未命中的机制。 每次执行关注程序的指令并且每次必须将指令重新加载到高速缓存中时,性能计数器都会递增。 从这些计数器的值可以确定高速缓存命中错失率。 当高速缓存命中错失率变得小于预定阈值时,即比高速缓存命中更高数量的高速缓存未命中时,本发明可以确定已经出现问题状况并启动“追尾”操作,以避免在 缓存。

    Enabling tracing of a repeat instruction
    87.
    发明授权
    Enabling tracing of a repeat instruction 失效
    启用跟踪重复指令

    公开(公告)号:US07062684B2

    公开(公告)日:2006-06-13

    申请号:US10325078

    申请日:2002-12-19

    IPC分类号: G06F11/00

    CPC分类号: G06F9/325 G06F11/3636

    摘要: A method and system for enabling tracing of a repeat instruction are provided. A repeat instruction is executed within a processor. In response to detecting a repeat instruction flag set during a last execution of the repeat instruction, an interrupt is initiated within the processor. The processor enables reading a count of executions for the repeat instruction from a storage unit within the processor by a trace program or external hardware during the interrupt.

    摘要翻译: 提供了一种用于启用跟踪重复指令的方法和系统。 在处理器内执行重复指令。 响应于检测在重复指令的最后执行期间设置的重复指令标志,在处理器内启动中断。 处理器可以在中断期间通过跟踪程序或外部硬件从处理器内的存储单元读取重复指令的执行次数。

    Managing garbage collection in a data processing system
    89.
    发明授权
    Managing garbage collection in a data processing system 有权
    在数据处理系统中管理垃圾回收

    公开(公告)号:US09418005B2

    公开(公告)日:2016-08-16

    申请号:US12235302

    申请日:2008-09-22

    IPC分类号: G06F12/02 G06F9/48

    CPC分类号: G06F12/0269 G06F9/4881

    摘要: A computer implemented method, apparatus, and computer program product for managing garbage collection. Monitoring is performed for a garbage collection state in a virtual machine. Responsive to detecting the garbage collection state, a priority for a set of garbage collection threads is increased.

    摘要翻译: 一种用于管理垃圾收集的计算机实现的方法,装置和计算机程序产品。 对虚拟机中的垃圾收集状态执行监视。 响应于检测垃圾收集状态,一组垃圾收集线程的优先级增加。

    EXCLUDING COUNTS ON SOFTWARE THREADS IN A STATE
    90.
    发明申请
    EXCLUDING COUNTS ON SOFTWARE THREADS IN A STATE 审中-公开
    在一个州的软件线程排除的计数

    公开(公告)号:US20150277994A1

    公开(公告)日:2015-10-01

    申请号:US14726567

    申请日:2015-05-31

    IPC分类号: G06F9/52

    摘要: The present disclosure provides a method, computer program product, and system for compensating for event counts for a thread occurring during targeted states on the thread. In example embodiments, the state is a spin loop state and instructions completed during the spin loop are eliminated from a performance report and are presented in the absence of the spin loop. In another embodiment, the event counts are interrupt counts eliminated during the spin loop.

    摘要翻译: 本公开提供了一种方法,计算机程序产品和系统,用于补偿在线程上的目标状态期间发生的线程的事件计数。 在示例实施例中,状态是自旋回路状态,并且在自旋回路期间完成的指令从性能报告中消除,并且在没有自旋回路的情况下呈现。 在另一个实施例中,事件计数是在自旋回路期间消除的中断计数。