公开(公告)号：US06359491B1

公开(公告)日：2002-03-19

申请号：US09567757

申请日：2000-05-10

申请人： Graham Andrew Cairns ,  Michael James Brownlow ,  Yasushi Kubota ,  Hajime Washio

发明人： Graham Andrew Cairns ,  Michael James Brownlow ,  Yasushi Kubota ,  Hajime Washio

IPC分类号： H03L500

CPC分类号： H03K19/018571

摘要： A voltage level shifter comprises complementary transistors T1, T2 connected between a supply line vdd and an inverting input !IN. The gates of the transistors T1 and T2 receive a shifted version of the direct input signal IN from a source-follower comprising the transistors T3 and T4.

摘要翻译： 电压电平移位器包括连接在电源线vdd和反相输入端IN之间的互补晶体管T1，T2。 晶体管T1和T2的栅极从包括晶体管T3和T4的源极跟随器接收直接输入信号IN的偏移形式。

公开(公告)号：US5898322A

公开(公告)日：1999-04-27

申请号：US524503

申请日：1995-09-07

申请人： Yasushi Kubota ,  Hiroshi Yoneda

发明人： Yasushi Kubota ,  Hiroshi Yoneda

IPC分类号： G02F1/133 ,  G11C19/00 ,  H01L27/12 ,  H03K19/0175 ,  H03K19/173 ,  H03K19/21 ,  H03K19/094 ,  H01L27/00

CPC分类号： H03K19/215 ,  H03K19/1737

摘要： A logic circuit performs a logic operation on a plurality of input logic signals and outputting a resultant logic signal. The logic circuit comprises a pass-transistor logic circuit including: a plurality of field effect transistors, at least two of the plurality of field effect transistors being coupled in series, a gate electrode of each of the at least two field effect transistors receiving a corresponding first logic signal, and one of drain and source electrodes ditto receiving a corresponding second logic signal; and a node for coupling the other of the drain and source electrodes of the at least two field effect transistors, and for outputting the resultant logic signal. The plurality of field effect transistors are thin film transistors (TFTs).

摘要翻译： 逻辑电路对多个输入逻辑信号执行逻辑运算并输出合成的逻辑信号。 逻辑电路包括一个通过晶体管逻辑电路，包括：多个场效应晶体管，多个场效应晶体管中的至少两个串联耦合，所述至少两个场效应晶体管中的每一个的栅电极接收相应的 第一逻辑信号，以及漏极和源极之一，同时接收对应的第二逻辑信号; 以及用于耦合所述至少两个场效应晶体管的所述漏极和源极中的另一个的节点，并用于输出所得到的逻辑信号。 多个场效应晶体管是薄膜晶体管（TFT）。

公开(公告)号：US5808595A

公开(公告)日：1998-09-15

申请号：US674601

申请日：1996-06-28

申请人： Yasushi Kubota ,  Masahiro Adachi ,  Hiromi Sakamoto ,  Narihiro Morosawa

发明人： Yasushi Kubota ,  Masahiro Adachi ,  Hiromi Sakamoto ,  Narihiro Morosawa

IPC分类号： G02F1/136 ,  G02F1/133 ,  G02F1/1345 ,  G02F1/1368 ,  G09G3/36 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01L29/78648 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0408 ,  G09G2300/043 ,  G09G2310/027

摘要： A thin-film transistor circuit, which is used as a driving circuit for driving pixels in an image display, is constituted of a plurality of thin-film transistors that are formed on an insulating substrate. In each thin-film transistor, a conductive electrode is placed so as to face a gate electrode with a channel region of a polycrystal silicon thin-film that forms an active layer located in between. Here, a constant voltage is applied to the conductive electrode. When threshold voltage is shifted by applying a voltage to the conductive electrode, it is possible to allow the absolute value of the threshold voltage of n-channel-type transistors and the absolute value of the threshold voltage of p-channel-type transistors to become virtually equal to each other. Moreover, it is possible to properly set the threshold voltage in accordance with factors such as the channel length of the thin-film transistors, the types of circuits that are constituted of the thin-film transistors and voltages to be applied to the thin-film transistors. Thus, it becomes possible to remarkably improve the characteristics of thin-film transistor circuits, such as operation speeds and holding characteristics.

摘要翻译： 作为用于驱动图像显示中的像素的驱动电路的薄膜晶体管电路由形成在绝缘基板上的多个薄膜晶体管构成。 在每个薄膜晶体管中，导电电极被放置成面对具有形成位于其间的有源层的多晶硅薄膜的沟道区的栅电极。 这里，向导电电极施加恒定电压。 当通过向导电电极施加电压来移动阈值电压时，可以允许n沟道型晶体管的阈值电压的绝对值和p沟道型晶体管的阈值电压的绝对值成为 几乎相等。 此外，可以根据诸如薄膜晶体管的沟道长度，由薄膜晶体管构成的电路的类型和施加到薄膜的电压等因素来适当地设置阈值电压 晶体管。 因此，可以显着提高诸如操作速度和保持特性的薄膜晶体管电路的特性。

公开(公告)号：US5804006A

公开(公告)日：1998-09-08

申请号：US643076

申请日：1996-04-30

申请人： Toshitake Kanno ,  Jun Iwahashi ,  Eiichi Sahara ,  Hidetaka Hiraoka ,  Mayuki Morinaka ,  Tsuneharu Sugie ,  Yasushi Kubota

发明人： Toshitake Kanno ,  Jun Iwahashi ,  Eiichi Sahara ,  Hidetaka Hiraoka ,  Mayuki Morinaka ,  Tsuneharu Sugie ,  Yasushi Kubota

IPC分类号： G01N25/06 ,  G01N25/04 ,  G01N33/20 ,  C21D1/54

CPC分类号： G01N25/04 ,  G01N33/206

摘要： A method for judging the properties of molten cast iron which consists of connecting three sampling vessels with an apparatus for obtaining a cooling curve of molten cast iron, measuring a cementite eutectic temperature (TEC) of cast iron poured to the first sampling vessel to which a chilling agent is contained, measuring a eutectic freezing temperature change of molten cast iron poured to the second sampling vessel being free of any additive, measuring a graphite eutectic temperature (TEG) of molten cast iron poured to the third sampling vessel, and inspecting a relation between the cementite eutectic temperature (TEC) and the graphite eutectic temperature (TEG) within the range of the eutectic freezing temperature change of molten cast iron.

摘要翻译： 一种用于判断熔融铸铁性能的方法，该方法由连接三个采样容器的组件组成，用于获得熔融铸铁冷却曲线的装置，测量流入第一取样容器的铸铁的渗碳体共晶温度（TEC） 测量浇注到第二取样容器中的熔融铸铁的共熔冷冻温度变化，不含任何添加剂，测量浇注到第三取样容器的熔融铸铁的石墨共晶温度（TEG），并检查关系 在熔融铸铁的共晶冷冻温度变化范围内的渗碳体共晶温度（TEC）和石墨共晶温度（TEG）之间。

公开(公告)号：US5134588A

公开(公告)日：1992-07-28

申请号：US558328

申请日：1990-07-27

申请人： Yasushi Kubota ,  Katsuji Iguchi

发明人： Yasushi Kubota ,  Katsuji Iguchi

IPC分类号： G11C13/00

CPC分类号： G11C13/00

摘要： A semiconductor memory device of a type comprising a plurality of sense amplifiers of differential type arranged in one direction, a pair of bit lines extending outwardly from opposite sides of each of the sense amplifiers, a plurality of word lines extending in a direction intersecting the bit lines, and a memory cell disposed at each of intersecting points between the bit lines and the word lines. The device is characterized in that the memory cells which are connected respectively with the neighboring bit lines are connected with the different word lines. Therefore, not only can the interference noise between each bit-line pair be reduced, but also any possible erroneous operation can be eliminated, thereby increasing the data reading speed.

摘要翻译： 一种类型的半导体存储器件，包括沿一个方向布置的多个差分型读出放大器，从每个读出放大器的相对侧向外延伸的一对位线，沿与该位相交的方向延伸的多个字线 线，以及设置在位线和字线之间的交点处的存储单元。 该装置的特征在于分别与相邻位线连接的存储单元与不同的字线连接。 因此，不仅可以减少每个位线对之间的干扰噪声，而且可以消除任何可能的错误操作，从而增加数据读取速度。

公开(公告)号：US20130223477A1

公开(公告)日：2013-08-29

申请号：US13643961

申请日：2011-04-18

申请人： Hidetaka Hiraoka ,  Yasushi Kubota ,  Haruo Ishiyama ,  Noriko Saito ,  Hirofumi Tabe

发明人： Hidetaka Hiraoka ,  Yasushi Kubota ,  Haruo Ishiyama ,  Noriko Saito ,  Hirofumi Tabe

IPC分类号： G01N1/12

CPC分类号： G01N1/125 ,  G01N25/06 ,  G01N33/205

摘要： Disclosed is a container for the thermal analysis of cast iron that enables a reduction in the amount of tellurium used in thermal analysis. By forming a plurality of fine spaces in the interior of a base plate (12) and sidewalls (11), thermal insulating properties are maintained in the base plate (12) and the sidewalls (11) and the temperature of a sample of the cast iron melt placed in the interior of the container (1) is prevented from cooling down. As a result, even if the amount of a sample supplied for thermal analysis is reduced, the speed by which the temperature of the sample drops is suppressed, and a constant temperature is maintained by the heat from the latent heat of solidification. Accordingly, the amount of tellurium used in thermal analysis can be reduced by reducing the amount of the sample supplied for thermal analysis.

摘要翻译： 公开了一种用于铸铁热分析的容器，其能够减少热分析中使用的碲的量。 通过在基板（12）和侧壁（11）的内部形成多个精细空间，在基板（12）和侧壁（11）中保持绝热性能和铸件样品的温度 放置在容器（1）的内部的铁熔体被防止冷却。 结果，即使为了进行热分析提供的样品的量减少，也可以抑制样品的温度降低的速度，并且通过来自固化潜热的热来保持恒定的温度。 因此，通过减少用于热分析的样品的量，可以减少热分析中使用的碲的量。

公开(公告)号：US08507669B2

公开(公告)日：2013-08-13

申请号：US12936415

申请日：2009-04-08

申请人： Yasushi Kubota ,  Tsutomu Inoue

发明人： Yasushi Kubota ,  Tsutomu Inoue

IPC分类号： C07D491/16 ,  C07D317/60

CPC分类号： C07D317/60 ,  C07D491/06 ,  C07D491/16 ,  C07D491/20

摘要： It is to provide a novel optically active dibenzazepine derivative having a high utility value as an asymmetric phase-transfer catalyst. It is an optically active 6,7-dihydro-5H-dibenzo[c,e]azepine derivative represented by the following formula (1′), (wherein R represents a divalent organic group for cross-linking the 1st position and the 11th position; R1 and R2 are the same or different, and represent a hydrogen atom, halogen atom, or organic group, or R1 and R2 together represent a divalent organic group; R3′ and R4′ are the same or different and represent a monovalent organic group, or R3′ and R4′ together form an organic group that forms a cyclic structure comprising an onium nitrogen atom; Ar represents a monovalent organic group; * represents optical activity, i.e., that one axially asymmetric isomer is present in excess of the other axially asymmetric isomer with respect to a bond axis that constitutes the biphenyl structure of the compound; and X− represents a counter anion).

摘要翻译： 提供作为不对称相转移催化剂的具有高效用价值的新颖的光学活性二苯并氮杂衍生物。 它是由下式（1'）表示的光学活性的6,7-二氢-5H-二苯并[c，e]吖庚因衍生物，其中R表示用于交联第1位和第11位的二价有机基 R1和R2相同或不同，表示氢原子，卤素原子或有机基团，或者R1和R2一起表示二价有机基团; R3'和R4'相同或不同，表示一价有机基团 或R3'和R4'一起形成形成包含鎓氮原子的环状结构的有机基团; Ar表示一价有机基团; *表示光学活性，即一种轴向不对称异构体存在于另一种轴向 相对于构成化合物的联苯结构的键轴的不对称异构体; X-表示抗衡阴离子）。

公开(公告)号：US08367820B2

公开(公告)日：2013-02-05

申请号：US11817585

申请日：2006-03-03

申请人： Keiji Maruoka ,  Yasushi Kubota

发明人： Keiji Maruoka ,  Yasushi Kubota

IPC分类号： C07D223/18

CPC分类号： B01J31/0271 ,  C07B53/00 ,  C07B2200/07 ,  C07C22/04 ,  C07C25/18 ,  C07C33/46 ,  C07C43/225 ,  C07D223/18 ,  C07D487/10

摘要： Disclosed is an optically active quaternary ammonium salt compound represented by the formula (1) below. Also disclosed are a production intermediate of such an optically active quaternary ammonium salt compound, and a method for producing such an optically active quaternary ammonium salt compound. (1) (In the formula, R1, R2, R21, R3 and R4 respectively represent an alkyl group, an aryl group or the like; R5 and R6 respectively represent an alkyl group, an alkoxy group or the like; and X− represents an anion.)

摘要翻译： 公开了由下式（1）表示的光学活性季铵盐化合物。 还公开了这种光学活性季铵盐化合物的制备中间体，以及这种光学活性季铵盐化合物的制造方法。 （1）（式中，R 1，R 2，R 21，R 3，R 4分别表示烷基，芳基等，R 5，R 6分别表示烷基，烷氧基等，X表示 阴离子）

公开(公告)号：US08277860B2

公开(公告)日：2012-10-02

申请号：US10550552

申请日：2004-03-26

申请人： Kakuhei Isawa ,  Tadashi Nakatsubo ,  Satoshi Hayashi ,  Yasushi Kubota

发明人： Kakuhei Isawa ,  Tadashi Nakatsubo ,  Satoshi Hayashi ,  Yasushi Kubota

IPC分类号： C11B5/00 ,  C07C51/15 ,  A21D4/00

CPC分类号： A23L3/3508 ,  C07C51/42 ,  Y02A40/944 ,  C07C65/11

摘要： A method for stabilizing 1,4-dihydroxy-2-naphthoic acid, which comprises reducing an oxygen dissolved in a solution containing 1,4-dihydroxy-2-naphthoic acid, and food or drink containing 1,4-dihydroxy-2-naphthoic acid.

摘要翻译： 一种稳定1,4-二羟基-2-萘甲酸的方法，其包括还原溶解在含有1,4-二羟基-2-萘甲酸的溶液中的氧，以及含有1,4-二羟基-2-萘甲酸的食品或饮料 酸。

公开(公告)号：US07711526B2

公开(公告)日：2010-05-04

申请号：US10891083

申请日：2004-07-15

申请人： Kazuhiro Maeda ,  Tamotsu Sakai ,  Yasushi Kubota ,  Shigeki Imai ,  Kenshi Tada ,  Kenji Taniguchi

发明人： Kazuhiro Maeda ,  Tamotsu Sakai ,  Yasushi Kubota ,  Shigeki Imai ,  Kenshi Tada ,  Kenji Taniguchi

IPC分类号： G06F7/60 ,  G06G7/62

CPC分类号： G06F17/5036

摘要： A transistor model for a simulator simulates a resistance between a source region and a drain region with a model equation which has terms representing resistance values corresponding respectively to areas of mutually different impurity concentrations below a gate section in simulating characteristics of a transistor. At least two of the terms each having a threshold parameter indicating a voltage at which a semiconductor element composed of the associated region and regions adjacent to that region changes from an ON state to an OFF state. The threshold parameters of the terms being specified independently from each other. Thus, the characteristics of a transistor having a set of areas of mutually different impurity concentrations below a gate section, inclusive of subthreshold regions which are difficult to evaluate through actual measurement, can be simulated to high accuracy while preserving a good fit with a capacitance model.

摘要翻译： 用于模拟器的晶体管模型利用模拟方程来模拟源极区域和漏极区域之间的电阻，其模型方程具有表示在模拟晶体管的特性中分别对应于栅极部分的相互不同的杂质浓度的区域的电阻值的项。 每个术语中的至少两个术语具有表示由相关区域和与该区域相邻的区域组成的半导体元件的电压的阈值参数从ON状态变为OFF状态。 术语的阈值参数彼此独立地指定。 因此，通过实际测量难以评估的具有低于栅极部分的杂质浓度相互不同的杂质浓度的区域的集合的特性可以被模拟成高精度，同时保持与电容模型的良好匹配 。