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公开(公告)号：US20220336729A1
公开(公告)日：2022-10-20
申请号：US17234792
申请日：2021-04-19
Applicant: Redpine Signals, Inc.
Inventor： Venkat MATTELA , Sanghamitra DEBROY , Santhosh SIVASUBRAMANI
Abstract: A multiplier device for binary magnetic applied fields uses Interlayer Exchange Coupling (IEC) structure where two layers of ferromagnetic material are separated from each other by non-magnetic layers of electrically conductive material of atomic thickness, sufficient to generate anti-magnetic response in a magnetized layer. A plurality of regions on a top surface are activated with a magnetic field in a first direction for a 1 value and in an opposite direction for a 0 value, the multiplication result presented as magnetic field direction on a plurality of output ferromagnetic regions.
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公开(公告)号：US20220334797A1
公开(公告)日：2022-10-20
申请号：US17234814
申请日：2021-04-20
Applicant: Redpine Signals, Inc.
Inventor： Santhosh SIVASUBRAMANI , Sanghamitra DEBROY
Abstract: A multiplier is formed from a plurality of nanomagnetic structures including slant edge input nanomagnetic structures, diagonal elongate interconnect nanomagnetic structures, and output nanomagnetic structures. Input logic levels are provided by inserting a magnetic field, which generates an set of output magnetic fields representing the product of the binary input values.
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公开(公告)号：US20220269485A1
公开(公告)日：2022-08-25
申请号：US17180856
申请日：2021-02-21
Applicant: Redpine Signals, Inc.
Inventor： Dylan FINCH
Abstract: A process for performing vector dot products receives a row vector and a column vector as floating point numbers in a format of sign plus exponent bits plus mantissa bits. The process generates a single dot product value by separately processing the sign bits, exponent bits, and mantissa bits to form a sign bit, a normalized mantissa formed by multiplying pairs multiplicand elements, and exponent information including MAX_EXP and EXP_DIFF. A second pipeline stage receives the multiplied pairs of normalized mantissas, optionally performs an exponent adjustment, pads, complements and shifts the normalized mantissas, and the results are added in a series of stages until a single addition result remains, which is normalized using MAX_EXP to form the floating point output result.
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84.发明申请公开(公告)号：US20220244914A1
公开(公告)日：2022-08-04
申请号：US17163494
申请日：2021-01-31
Applicant: Redpine Signals, Inc.
Inventor： Martin KRAEMER , Ryan BOESCH , Wei XIONG
Abstract: A Unit Element (UE) has a digital X input and a digital W input, and comprises groups of NAND gates generating complementary outputs which are coupled to differential charge transfer lines through respective charge transfer capacitor Cu. The number of bits in the X input determines the number of NAND gates in a NAND-group and the number of bits in the W input determines the number of NAND groups. Each NAND-group receives one bit of the W input applied to all of the NAND gates of the NAND-group, and each unit element having the bits of X applied to each associated NAND gate input of each unit element. The NAND gate outputs are coupled through a charge transfer capacitor Cu to charge transfer lines. Multiple Unit Elements may be placed in parallel to sum and scale the charges from the charge transfer lines, the charges coupled to an analog to digital converter which forms the dot product output.
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公开(公告)号：US20220181545A1
公开(公告)日：2022-06-09
申请号：US17114498
申请日：2020-12-08
Applicant: Redpine Signals, Inc.
Inventor： Venkat MATTELA , Sanghamitra DEBROY , Santhosh SIVASUBRAMANI , Amit ACHARYYA
Abstract: An adder device for binary magnetic applied fields uses Interlayer Exchange Coupling (IEC) structure where two layers of ferromagnetic material are separated from each other by non-magnetic layers of electrically conductive material of atomic thickness, sufficient to generate anti-magnetic response in a magnetized layer. A set of regions are positioned on a top layer above a continuous bottom layer, and the regions excited with magnetization for A and not A, B and not B, and C and not C to form a sum and an inverse carry output magnetization.
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Patent Agency Ranking
公开(公告)号：US20220068970A1
公开(公告)日：2022-03-03
申请号：US17006818
申请日：2020-08-29
Applicant: Redpine Signals, Inc.
Inventor： Venkat MATTELA , Sanghamitra DEBROY , Santhosh SIVASUBRAMANI , Amit ACHARYYA
IPC: H01L27/118 , H01L29/66
Abstract: An AND or OR logic device has multiple layers of ferromagnetic material separated from each other by non-magnetic layers of electrically conductive material of atomic thickness, sufficient to generate anti-magnetic response in a magnetized layer. The anti-magnetic response in a layer below a layer magnetized with a polarity is summed in a region which is coupled to an output, the output generating at least one of a AND or OR logic function on applied input magnetization.
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公开(公告)号：US20210072995A1
公开(公告)日：2021-03-11
申请号：US16945936
申请日：2020-08-03
Applicant: Redpine Signals, Inc.
Abstract: A multi-thread processor has a canonical thread map register which outputs a sequence of thread_id values indicating a current thread for execution. The thread map register is programmable to provide granularity of number of cycles of the canonical sequence assigned to each thread. In one example of the invention, the thread map register has repeating thread identifiers in a sequential or non-sequential manner to overcome memory latency and avoid thread stalls. In another example of the invention, separate interrupt tasks are placed on each thread to reduce interrupt processing latency.
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公开(公告)号：US10931301B2
公开(公告)日：2021-02-23
申请号：US16715759
申请日：2019-12-16
Applicant: Redpine Signals, Inc.
Inventor： Subba Reddy Kallam , Sriram Mudulodu
IPC: H03M7/00 , H03M7/30 , G06F9/30 , G06F9/22 , G06F16/901
Abstract: A code decompression engine reads compressed code from a memory containing a series of code parts and a dictionary part. The code parts each have a bit indicating compressed or uncompressed. When the code part is compressed, it has a value indicating the number of segments, followed by the segments, followed by an index into the dictionary part. The decompressed instruction is the dictionary value specified by the index, which is modified by the segments. Each segment describes the modification to the dictionary part specified by the index by a mask type, a mask offset, and a mask.
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89.发明申请公开(公告)号：US20190394730A1
公开(公告)日：2019-12-26
申请号：US16012766
申请日：2018-06-20
Applicant: Redpine Signals, Inc.
Inventor： Logeshwaran VIJAYAN , Sriram MUDULODU
IPC: H04W52/02 , H04B17/318 , H04L27/26
Abstract: A power saving receiver has a controller which is operative to remove power from the receiver when a threshold is exceeded during reception of a packet. The threshold level is formed by comparison of any of: signal energy of unoccupied subcarriers less the signal energy in occupied subcarriers; signal energy in a first range of occupied subcarriers compared to signal energy in a different range of occupied subcarriers; error vector magnitude from a first set of subcarriers to a second set of subcarriers in a different spectral region of the channel; cyclic prefix cross-correlation, or common phase error increase.
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公开(公告)号：US20190191374A1
公开(公告)日：2019-06-20
申请号：US16221561
申请日：2018-12-16
Applicant: Redpine Signals, Inc.
Inventor： Partha Sarathy MURALI , SuryaNarayana Varma Nallajaraju
CPC classification number: H04W52/0229 , H04B7/00 , H04W4/80 , H04W84/12
Abstract: A preamble detector for a Bluetooth Long Range includes a receiver for forming baseband samples from Bluetooth packets and a preamble detect controller for enabling and disabling power to the receiver. Where the preamble duration is Tcyc, the preamble detector turns on for a preamble detect time T1 and turns off for a duration T2, where T2=Tcyc−2*T1. A series of hierarchical decisions is made on sequentially increasing intervals of time based on an accumulated correlation result of correlating the baseband samples against a SYNC sequence to power the receiver back down before the end of the T1 period when the accumulated correlation result is below a threshold and continues to a subsequent correlation interval when the accumulated correlation result is above a threshold, where the threshold is established to have at least a 20% false alarm rate for preamble detection.
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