公开(公告)号：US20130007717A1

公开(公告)日：2013-01-03

申请号：US13170754

申请日：2011-06-28

申请人： Cary L. Bates

发明人： Cary L. Bates

IPC分类号： G06F9/44 ,  G06F9/45

CPC分类号： G06F11/362 ,  G06F8/41 ,  G06F11/3624 ,  G06F11/3656

摘要： Integrating compiler warnings into a debug session including: receiving, by a debugger for a debug session of a debuggee from a compiler, compiled source code for execution and compiler warning data describing one or more compiler warnings generated at compile time of the debuggee, each compiler warning resulting from a source code variable statement in the debuggee source code; receiving, by the debugger, a request to evaluate a variable; determining, from the compiler warning data, whether evaluating the variable is dependent upon a source code variable statement resulting in a compiler warning; and, if evaluating the variable is dependent upon a source code variable statement resulting in a compiler warning, returning, by the debugger responsive to the request along with a result of the evaluation, a compiler warning indicator.

摘要翻译： 将编译器警告集成到调试会话中，包括：由调试器接收来自编译器的调试器的调试会话，编译用于执行的源代码和描述在调试器的编译时生成的一个或多个编译器警告的编译器警告数据，每个编译器 在调试源代码中由源代码变量语句引起的警告; 由调试器接收一个评估变量的请求; 从编译器警告数据确定是否评估变量取决于导致编译器警告的源代码变量语句; 并且，如果评估变量取决于导致编译器警告的源代码变量语句，则响应于该请求的调试器以及评估结果返回编译器警告指示符。

公开(公告)号：US20120317550A1

公开(公告)日：2012-12-13

申请号：US13590030

申请日：2012-08-20

申请人： Michael Lindahl ,  Andre Yew ,  Mallory Morgan Green, II ,  Michael Johnson ,  Allan Craig Franklin ,  Daniel O'Dowd ,  Neil Puthuff

发明人： Michael Lindahl ,  Andre Yew ,  Mallory Morgan Green, II ,  Michael Johnson ,  Allan Craig Franklin ,  Daniel O'Dowd ,  Neil Puthuff

IPC分类号： G06F9/44

CPC分类号： G06F11/3636 ,  G06F11/3656

摘要： A method and system debug a computer program by using trace data, which is a recording of the sequence of machine instructions executed by a program during a time period along with the addresses and values of memory locations accessed and modified by each machine instruction. After the time period, the method and system use the trace data to simulate the execution of the program during the time period under the control of a debugger. In addition, the method and system use the trace data to simulate the execution of the program during the time period backwards in time under the control of the debugger.

摘要翻译： 一种方法和系统，通过使用跟踪数据来调试计算机程序，该跟踪数据是在一段时间内由程序执行的机器指令序列与每个机器指令访问和修改的存储单元的地址和值的记录。 在该时间段之后，方法和系统使用跟踪数据来模拟程序在调试器控制期间的执行。 此外，该方法和系统使用跟踪数据在调试器的控制下在时间间隔期间模拟程序的执行。

公开(公告)号：US20120266029A1

公开(公告)日：2012-10-18

申请号：US13088498

申请日：2011-04-18

申请人： Albrecht Mayer ,  Harry Siebert

发明人： Albrecht Mayer ,  Harry Siebert

IPC分类号： G06F11/34

CPC分类号： G06F11/3466 ,  G06F11/3476 ,  G06F11/3636 ,  G06F11/3656 ,  G06F13/28

摘要： An arrangement for processing trace data information is provided, the arrangement including, a chip including one or more memory circuits configured to store trace data information relating to a series of instructions, and a trace data information port configured to provide off-chip access to the trace data information; and a direct memory access controller circuit configured to control the transportation of trace data information from the one or more memory circuits to the trace data information port.

摘要翻译： 提供了一种用于处理跟踪数据信息的装置，该装置包括：包括被配置为存储与一系列指令相关的跟踪数据信息的一个或多个存储器电路的芯片以及被配置为提供片外访问的跟踪数据信息端口 跟踪数据信息; 以及直接存储器访问控制器电路，被配置为控制将跟踪数据信息从一个或多个存储器电路传送到跟踪数据信息端口。

公开(公告)号：US08255749B2

公开(公告)日：2012-08-28

申请号：US12511957

申请日：2009-07-29

申请人： Gary L. Swoboda

发明人： Gary L. Swoboda

IPC分类号： G01R31/28

CPC分类号： G01R31/3177 ,  G01R31/31701 ,  G01R31/31713 ,  G01R31/31723 ,  G01R31/31727 ,  G01R31/318533 ,  G01R31/318538 ,  G01R31/318544 ,  G06F11/22 ,  G06F11/267 ,  G06F11/27 ,  G06F11/36 ,  G06F11/3656 ,  G06F2201/88 ,  H04L43/50

摘要： Topology discovery of a target system having a plurality of components coupled with a scan topology may be performed by driving a low logic value on the data input signal and a data output signal of the scan topology. An input data value and an output data value for each of the plurality of components is sampled and recorded. A low logic value is then scanned through the scan path and recorded at each component. The scan topology may be determined based on the recorded data values and the recorded scan values.

摘要翻译： 可以通过驱动数据输入信号上的低逻辑值和扫描拓扑的数据输出信号来执行具有与扫描拓扑结合的多个分量的目标系统的拓扑发现。 对多个分量中的每一个的输入数据值和输出数据值进行采样和记录。 然后通过扫描路径扫描低逻辑值，并记录在每个组件上。 可以基于记录的数据值和记录的扫描值来确定扫描拓扑。

公开(公告)号：US08190139B2

公开(公告)日：2012-05-29

申请号：US12218711

申请日：2008-07-17

申请人： Casimir Johan Crawley ,  Alan Lee Strader

发明人： Casimir Johan Crawley ,  Alan Lee Strader

IPC分类号： H04M3/00

CPC分类号： G06F11/3656

摘要： A telematics system and method is provided, wherein the telematics system includes a processor having a core, a cell in communication with the core, and an applications processor in communication with the mobile processor. The system further includes at least one communication channel in communication between the mobile processor and the applications processor, wherein the mobile processor and the applications processor communicate data over the at least one communication channel during normal operation of a telematics system, and the mobile processor and applications processor communicate data over the at least one communication channel when the telematics system is at least one of being developed and manufactured.

摘要翻译： 提供远程信息处理系统和方法，其中远程信息处理系统包括具有核心的处理器，与核心通信的小区以及与移动处理器通信的应用处理器。 该系统还包括在移动处理器和应用处理器之间的通信中的至少一个通信信道，其中移动处理器和应用处理器在远程信息处理系统的正常操作期间通过至少一个通信信道通信数据，并且移动处理器和 当远程信息处理系统是开发和制造中的至少一个时，应用处理器在所述至少一个通信信道上通信数据。

公开(公告)号：US08185879B2

公开(公告)日：2012-05-22

申请号：US11557005

申请日：2006-11-06

申请人： Radhika Thekkath ,  Franz Treue ,  Ernest L. Edgar ,  Richard T. Leatherman

发明人： Radhika Thekkath ,  Franz Treue ,  Ernest L. Edgar ,  Richard T. Leatherman

IPC分类号： G06F9/44 ,  G06F9/45 ,  G06F11/00

CPC分类号： G06F11/3636 ,  G06F11/3648 ,  G06F11/3656

摘要： A method for tracing a multi-tasking embedded pipelined processor includes executing compiled code including trace controls. Tracing is initiated when the execution of the compiled code is initiated. Tracing is stopped when execution of the compiled code is completed. A trace record is formed during tracing. The trace record includes a processor mode indication, application space identity value and an instruction architecture set mode indication.

摘要翻译： 用于跟踪多任务嵌入式流水线处理器的方法包括执行包括跟踪控制的编译代码。 执行编译代码时启动跟踪。 编译代码的执行完成后，跟踪停止。 在跟踪期间形成跟踪记录。 跟踪记录包括处理器模式指示，应用空间标识值和指令体系结构设置模式指示。

公开(公告)号：US20120079327A1

公开(公告)日：2012-03-29

申请号：US13279561

申请日：2011-10-24

申请人： Martin VORBACH

发明人： Martin VORBACH

IPC分类号： G06F11/36

CPC分类号： G06F11/26 ,  G06F9/30036 ,  G06F11/267 ,  G06F11/3656 ,  G06F15/7867

摘要： A method for debugging reconfigurable hardware is described. According to this method, all necessary debug information is written in each configuration cycle into a memory, which is then analyzed by the debugger.

摘要翻译： 描述了一种用于调试可重配置硬件的方法。 根据该方法，将所有必需的调试信息在每个配置周期中写入存储器，然后由调试器进行分析。

公开(公告)号：US20120072791A1

公开(公告)日：2012-03-22

申请号：US12886629

申请日：2010-09-21

申请人： Hong S. Kim ,  Paul F. Policke ,  Paul Douglas Bassett

发明人： Hong S. Kim ,  Paul F. Policke ,  Paul Douglas Bassett

IPC分类号： G11C29/12 ,  G06F11/27

CPC分类号： G06F11/3656

摘要： A method and apparatus for performing a memory dump. The method includes providing a memory location from a debugger to a memory array through a BIST wrapper, and receiving data by the debugger read from the memory location in the memory array. The method can include sending a dump enable signal from the debugger, and the BIST wrapper selectively providing the memory location to the memory array in response to the dump enable signal. The method can include sending the dump enable signal to a multiplexer coupled to a register in the BIST wrapper, the dump enable signal causing the multiplexer to load the register with the memory location. The method can include asynchronously sending a write disable signal to the memory array before reading the data from the memory location. The received data can be selected from a larger set of data read from the memory location.

摘要翻译： 一种用于执行存储器转储的方法和装置。 该方法包括通过BIST包装器从调试器提供存储器位置到存储器阵列，以及通过从存储器阵列中的存储器位置读取的调试器接收数据。 该方法可以包括从调试器发送转储使能信号，并且BIST封装器响应于转储使能信号而选择性地将存储器位置提​​供给存储器阵列。 该方法可以包括将转储使能信号发送到耦合到BIST封装中的寄存器的多路复用器，转储使能信号使多路复用器将存储器位置加载寄存器。 该方法可以在从存储器位置读取数据之前异步地向存储器阵列发送写禁止信号。 所接收的数据可以从从存储器位置读取的更大数据集中选择。

公开(公告)号：US20120033336A1

公开(公告)日：2012-02-09

申请号：US12914933

申请日：2010-10-28

申请人： XING-HUA TANG

发明人： XING-HUA TANG

IPC分类号： H02H9/00

CPC分类号： G06F11/3656

摘要： A debug interface circuit connecting between a connector and an integrated circuit (IC) of an electronic device. The connector is used for providing a path for a debug device debugging the IC. The debug interface circuit includes a first electrostatic protection unit and a second electrostatic protection unit. One end of the first electrostatic protection unit is electrically connected between a first pin of the IC and an output port of the connector, and the other end of the first electrostatic protection unit is electrically grounded. One end of the second electrostatic protection unit is electrically connected between a second pin of the IC and an input port of the connector, and the other end of the second electrostatic protection unit is electrically grounded. The first pin is used for receiving signals from the output port. The second pin used for transmitting signals to the input port.

摘要翻译： 连接电子设备的连接器和集成电路（IC）之间的调试接口电路。 该连接器用于为调试IC的调试设备提供路径。 调试接口电路包括第一静电保护单元和第二静电保护单元。 第一静电保护单元的一端电连接在IC的第一引脚和连接器的输出端口之间，第一静电保护单元的另一端电接地。 第二静电保护单元的一端电连接在IC的第二引脚和连接器的输入端口之间，第二静电保护单元的另一端电接地。 第一个引脚用于从输出端口接收信号。 用于将信号发送到输入端口的第二个引脚。

公开(公告)号：US08074118B2

公开(公告)日：2011-12-06

申请号：US12475934

申请日：2009-06-01

申请人： Marc Dressler ,  Daniel Hofmann ,  Bastian Kellers ,  Thorsten Hufnagel

发明人： Marc Dressler ,  Daniel Hofmann ,  Bastian Kellers ,  Thorsten Hufnagel

IPC分类号： G06F11/00

CPC分类号： G06F11/3656

摘要： A method for influencing a control unit by means of a manipulation unit whereby the control unit has at least one microcontroller, at least one memory having a plurality of memory cells and at least one debug interface, and the debug interface has a monitoring functionality for observing the memory content, and by means of the debug interface a first point in time of the control unit for writing a first value to a first memory cell is detected, and a triggering point in time for a processing routine by the manipulation unit is obtained as the result based on the information transmitted to the manipulation unit by the debug interface at the first point in time, and at a second point in time, a second value is written to the first memory cell by the manipulation unit by means of the processing routine via the debug interface before the first memory cell is read by the control unit at a third point in time.

摘要翻译： 一种用于通过操纵单元影响控制单元的方法，由此所述控制单元具有至少一个微控制器，至少一个具有多个存储器单元的存储器和至少一个调试接口，并且所述调试接口具有用于观察的监视功能 检测存储器内容，并且通过调试接口，将用于向第一存储单元写入第一值的控制单元的第一时间点检测到，并且获得由操作单元执行的处理程序的触发时间点作为 基于通过调试接口在第一时间点发送到操作单元的信息的结果，并且在第二时间点，通过处理程序由操作单元将第二值写入第一存储器单元 在第三时间点由控制单元读取第一存储单元之前的调试接口。