DISPLAY DEVICE
    82.
    发明申请
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20190147813A1

    公开(公告)日:2019-05-16

    申请号:US16242923

    申请日:2019-01-08

    Abstract: A display device includes: a display panel having a display area with a plurality of pixel areas and a non-display area adjacent the display area, the display panel may include a substrate including at least one thin film transistor in each of the pixel areas and a display element connected to the thin film transistor; lighting circuits in the non-display area on the substrate to check lighting states of the display element; signal wires in the non-display area on the substrate to supply a signal to the lighting circuits; dummy circuits including a plurality of dummy capacitors, each of which include a first dummy capacitor electrode and a second dummy capacitor electrode, wherein the dummy circuits collect external static electricity coming through the signal wires before the external static electricity flows into the lighting circuits.

    GOA DRIVE UNIT AND GOA DRIVE CIRCUIT
    84.
    发明申请

    公开(公告)号:US20190088181A1

    公开(公告)日:2019-03-21

    申请号:US15533836

    申请日:2017-05-02

    Inventor: Weixin MA

    Abstract: Disclosed are a GOA drive unit and a GOA drive circuit. The GOA drive unit includes a bidirectional selection unit. The bidirectional selection unit is activated under an action of a first control signal and a second control signal which are complementary to each other in timing sequence, and outputs a first selection signal. The bidirectional selection unit is activated under an action of a third control signal and a fourth control signal which are complementary to each other in timing sequence, and outputs a second selection signal. The GOA drive unit can reduce the influence of stress and improve the reliability of the GOA drive circuit.

    SHIFT REGISTER
    85.
    发明申请
    SHIFT REGISTER 审中-公开

    公开(公告)号:US20180350444A1

    公开(公告)日:2018-12-06

    申请号:US15813702

    申请日:2017-11-15

    Abstract: A shift register includes a first switch and a second switch coupled to a first node, a pull-down circuit selectively connecting the first node to a voltage end according to a potential of a second node, a control circuit, and an input stage circuit which may receive a previous-stage shift register output signal, a next-stage shift register output signal, and at least one scanning order logic signal. The first switch receives clock signals. A first output end of the input stage circuit outputs the previous-stage shift register output signal or the next-stage shift register output signal to a control end of the second switch based on the scanning order logic signal. The previous-stage shift register output signal or the next-stage shift register output signal triggers a second output end of the input stage circuit to output the scanning order logic signal to an input end of the control circuit.

    GATE DRIVING UNIT AND GATE DRIVING CIRCUIT
    86.
    发明申请

    公开(公告)号:US20180336835A1

    公开(公告)日:2018-11-22

    申请号:US15328941

    申请日:2017-01-05

    Inventor: Xujun Liu

    CPC classification number: G09G3/34 G09G3/36 G09G3/3677 G09G2300/0408 H01L33/00

    Abstract: Disclosed is a gate driving unit and a driving circuit, the gate driving unit comprising a pull-up control unit for generating a scanning control signal; a pull-up cascade transmission unit for converting a scanning clock signal into a line scanning signal; a pull-down unit for pulling down the scanning control signal and the line scanning signal to a low level; and a pull-down maintaining unit for maintaining the scanning control signal and the line scanning signal at the low level. The gate driving unit increases the reliability of the gate driving circuit.

    DISPLAY PANEL
    88.
    发明申请
    DISPLAY PANEL 审中-公开

    公开(公告)号:US20180331125A1

    公开(公告)日:2018-11-15

    申请号:US15976856

    申请日:2018-05-10

    Abstract: A display panel including a display region and a non-display region, a plurality of gate lines, a plurality of data lines, a pixel array and a gate on array circuit. The non-display region is located at one side of the display region. The plurality of gate lines and the plurality of data lines are disposed in the display region. The pixel array is located in the display region, wherein the pixel array is composed of a plurality of pixel units that are repeatedly arranged. The pixel units consist of three gate lines, two data lines and six sub-pixels, and each sub-pixel is electrically connected to one of the gate lines and one of the data lines located in the pixel array respectively. The gate on array circuit is disposed in the pixel array.

    GOA DRIVE CIRCUIT
    90.
    发明申请
    GOA DRIVE CIRCUIT 审中-公开

    公开(公告)号:US20180293950A1

    公开(公告)日:2018-10-11

    申请号:US15539733

    申请日:2017-05-08

    Applicant: Xiaowen LV

    Inventor: Xiaowen LV

    CPC classification number: G09G3/3677 G09G2300/0408 G09G2300/0842

    Abstract: Disclosed is a GOA drive circuit, which includes multiple stages of GOA drive units. A pull-down unit of a GOA drive unit in each stage is configured to increase a time for a first voltage signal to be pulled down to a first electric potential during a process when the first voltage signal jumps from a high electric potential to a low electric potential, so as to enable the first voltage signal to have a stepwise falling edge. In the GOA drive circuit, smoothness of a voltage at a key node thereof during a voltage changing process can be ensured, whereby an output performance of the GOA drive circuit can be improved, and an overall performance thereof can be improved accordingly.

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