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公开(公告)号：US20240242659A1
公开(公告)日：2024-07-18
申请号：US18005373
申请日：2021-11-24
发明人： Li XIAO , Seungwoo HAN , Dongni LIU , Haoliang ZHENG , Minghua XUAN , Jiao ZHAO , Liang CHEN , Xiaorong CUI
IPC分类号： G09G3/32
CPC分类号： G09G3/32 , G09G2300/0861 , G09G2310/0251 , G09G2310/0262 , G09G2310/0297
摘要： A display substrate includes a plurality of data lines extending in a first direction, and a plurality of sub-pixels. A sub-pixel includes a pixel driving circuit and a light-emitting device. The pixel driving circuit includes a current control circuit, and a duration control circuit electrically connected to the current control circuit and the light-emitting device. The current control circuit is configured to generate a driving signal to drive the light-emitting device to emit light; and the duration control circuit is configured to generate a duration control signal to control a duration of a connection between the current control circuit and the light-emitting device. The current control circuit and the duration control circuit are electrically connected to a same data line.
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公开(公告)号：US20230043192A1
公开(公告)日：2023-02-09
申请号：US17789193
申请日：2021-08-16
发明人： Liang CHEN , Ke WANG , Haoliang ZHENG , Minghua XUAN , Dongni LIU , Hao CHEN , Qi QI
IPC分类号： H01L27/12 , H01L25/16 , H01L23/00 , G09G3/3233
摘要： A display backplane is provided, including a base, wherein pixel circuits, bonding electrodes, and bonding connection wires are on the base; the bonding electrodes are coupled to the bonding connection wires in a one-to-one correspondence; the bonding electrodes and the bonding connection wires are on two opposite surfaces of the base; the pixel circuits and the bonding connection wires are on a same side of the base; one end of each bonding connection wire is coupled to the bonding electrode through the first via in the base; the other end of each of at least some bonding connection wires is coupled to the pixel circuit; and an orthographic projection of at least one of the bonding electrodes and the bonding connection wires on the base is not coincident with an orthographic projection of the pixel circuit on the base.
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公开(公告)号：US20220406245A1
公开(公告)日：2022-12-22
申请号：US17642025
申请日：2021-04-08
发明人： Hao CHEN , Zhenyu ZHANG , Jiao ZHAO , Li XIAO , Dongni LIU , Haoliang ZHENG , Liang CHEN , Minghua XUAN , Ming YANG , Xinhong LU , Qi QI
摘要： An array substrate, a detection method for the array substrate, and a tiled display panel. In the array substrate, each of pixels (1) comprises sub-pixels (01) of at least three colors and a. pixel driving chip (02) for driving each sub-pixel (01) to emit light; each sub-pixel (01) comprises at least one inorganic light-emitting diode; a display area (A1) further comprises: a positive signal line (Tian) connected to a positive electrode of each inorganic light-emitting diode, and a data signal line (Din), a scanning line (Sn), and a reference signal line (Vm) connected to each pixel driving chip (02); each pixel driving chip (02) is used for writing signals of the data signal line (Dm) into the sub-pixels (01) of different colors under the control of the corresponding scanning line (Sn) in a time division manner.
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公开(公告)号：US20220335889A1
公开(公告)日：2022-10-20
申请号：US17760733
申请日：2021-03-18
发明人： Haoliang ZHENG , Minghua XUAN , Dongni LIU , Zhenyu ZHANG , Li XIAO , Liang CHEN , Hao CHEN , Jiao ZHAO , Lijun YUAN , Yi OUYANG , Qi QI
IPC分类号： G09G3/3233 , G11C19/28
摘要： A shift register (SR) includes a voltage control circuit (110) and a bias compensation circuit (120). The voltage control circuit (110) is configured to control a voltage at a first node (Output) to be a first voltage or a second voltage. The bias compensation circuit (120) is configured to: when the voltage at the first node (Output) is the first voltage, transmit a first signal received by a first signal terminal (VDD-A) to a first signal output terminal (EM1), and transmit a second signal received by a second signal terminal (VDD-B) to a second signal output terminal (EM2); and in response to the voltage at the first node (Output) being the second voltage, transmit a signal received by a first voltage terminal (LVGL1) to the first signal output terminal (EM1) and the second signal output terminal (EM2).
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公开(公告)号：US20220319413A1
公开(公告)日：2022-10-06
申请号：US17052152
申请日：2019-09-03
发明人： Minghua XUAN , Xiaochuan CHEN , Dongni LIU
IPC分类号： G09G3/3233 , G09G3/20
摘要： A pixel driving circuit includes a driving signal control sub-circuit and a driving duration control sub-circuit. The driving signal control sub-circuit is configured to provide a driving signal to the driving duration control sub-circuit under control of a first scanning signal terminal and a enable signal terminal. The driving signal is related to a first data signal received at a first data signal terminal and a first voltage signal received at a first voltage signal terminal. The driving duration control sub-circuit is configured to transmit the driving signal to the element to be driven under control of a second scanning signal terminal and a enable signal terminal. A duration for which the driving signal is transmitted to the element to be driven is related to a second data signal received at a second data signal terminal.
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公开(公告)号：US20220293037A1
公开(公告)日：2022-09-15
申请号：US17511335
申请日：2021-10-26
发明人： Haoliang ZHENG , Minghua XUAN , Dongni LIU , SeungWoo HAN , Li XIAO , Liang CHEN , Hao CHEN , Jiao ZHAO , Qi QI
IPC分类号： G09G3/32
摘要： Disclosed is an array substrate including multiple first selection circuits with each including at least two first selection transistors and at least two first anticreeping transistors. Each first selection transistor is connected with one first anticreeping transistor in series. When the first selection transistor is turned on by a first turn-on signal from a first control signal terminal, the first anticreeping transistor is turned on by a second turn-on signal from a second control signal terminal. When the first selection transistor is turned off by a first turn-off signal from the first control signal terminal, the first anticreeping transistor is turned off to make the first selection transistors and the data signal terminal disconnected, by a second turn-off signal from the second control signal terminal. A voltage of the first turn-off signal is greater than a voltage of the second turn-off signal.
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公开(公告)号：US20220285455A1
公开(公告)日：2022-09-08
申请号：US17664809
申请日：2022-05-24
发明人： Can WANG , Can ZHANG , Xiaochuan CHEN , Minghua XUAN , Han YUE , Ming YANG , Ning CONG
摘要： The present application relates to a display panel, a manufacturing method thereof, and a display device. The display panel includes a base substrate, a plurality of pixel structures on the base substrate, and a color resist layer on a side of the plurality of pixel structures facing away the base substrate. The color resist layer includes a plurality of color resist blocks in one-to-one correspondence with the plurality of pixel structures. Light emitted from each of the plurality of pixel structures has the same color as the color resist block corresponding thereto.
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公开(公告)号：US20220231105A1
公开(公告)日：2022-07-21
申请号：US17615058
申请日：2021-02-24
发明人： Dongni LIU , Minghua XUAN , Haoliang ZHENG , Jiao ZHAO
IPC分类号： H01L27/32
摘要： An array substrate is configured to carry a plurality of light emitting units with different light emitting colors. The array substrate includes a plurality of pixel driving circuits, a first voltage input line and a second voltage input line. The plurality of pixel driving circuits include at least one first driving circuit and at least one second driving circuit. The first voltage input line is coupled to the at least one first driving circuit, and is configured to transmit a first voltage to the at least one first driving circuit. The second voltage input line is coupled to the at least one second driving circuit, and is configured to transmit a second voltage to the at least one second driving circuit. The first voltage is different from the second voltage.
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公开(公告)号：US20220101783A1
公开(公告)日：2022-03-31
申请号：US17476798
申请日：2021-09-16
发明人： Seungwoo HAN , Haoliang ZHENG , Li XIAO , Minghua XUAN
IPC分类号： G09G3/32
摘要： The present disclosure provides a pixel driving structure and a display panel. The pixel driving structure includes a pulse width modulation driving circuit, a pulse amplitude modulation driving circuit, and a buffer circuit. The pulse width modulation driving circuit is configured to control a pulse width of a driving current supplied to the light emitting device to be driven according to a pulse width modulation data voltage; the pulse amplitude modulation driving circuit is configured to control an amplitude of the driving current supplied to the light emitting device to be driven according to a pulse amplitude modulation data voltage; and the buffer circuit is electrically coupled between the pulse width modulation driving circuit and the pulse amplitude modulation driving circuit and is configured to adjust a rate at which the pulse width modulation driving circuit applies a pulse width modulation voltage to the pulse amplitude modulation driving circuit.
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公开(公告)号：US20210366389A1
公开(公告)日：2021-11-25
申请号：US16491547
申请日：2019-03-28
发明人： Dongni LIU , Minghua XUAN , Xiaochuan CHEN , Lei WANG , Zheng FANG , Li XIAO , Liang CHEN , Shengji YANG , Pengcheng LU
IPC分类号： G09G3/3233
摘要： A pixel driving circuit including: N pixel circuits each including a first node and a power supply terminal, N being an integer greater than 1; and N multiplexing circuits configured to selectively couple a data line to the first nodes of the N pixel circuits. A first one of the N multiplexing circuits includes a multiplexing control circuit, and a second one to an N-th one of the N multiplexing circuits include respective multiplexing control circuits and respective reset circuits. The reset circuit of a (j+1)-th one of the N multiplexing circuits is configured to reset the first node of a (j+1)-th one of the N pixel circuits with a power supply voltage in response to a j-th multiplexing control signal being active, j being an integer and 1≤j
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