摘要:
A method for controlling the operation of a brushless DC fan for cooling heat generating components of a system is provided. The method includes providing a system temperature signal indicative of a system temperature and providing an intelligent shutdown enable signal. The system temperature signal is compared with a shutdown temperature signal if the intelligent shutdown enable signal has a first value. The shutdown temperature signal is representative of a shutdown temperature value. The fan is operated at a generally temperature proportional speed after comparing the system temperature signal with the shutdown temperature signal if the system temperature as indicated by the system temperature signal is greater than the shutdown temperature value as indicated by the shutdown temperature signal. A shutdown mode is entered by the fan after comparing the system temperature signal with the shutdown temperature signal if the system temperature as indicated by the system temperature signal is less than the shutdown temperature value as indicated by the shutdown temperature signal. The system temperature signal is compared with the shutdown temperature signal after entering the shutdown mode by the fan. Operation of the fan is initiated if the system temperature as indicated by the system temperature signal is greater than the shutdown temperature value as indicated by the shutdown temperature signal and the fan is in the shutdown mode.
摘要:
A programmable low dropout regulator includes an operational amplifier which is used both to provide a bandgap voltage and to drive an output load. In one embodiment implemented in an integrated circuit, external resistors are provided by the user to achieve a user-selected regulated voltage. In that embodiment, an input pin allows the user to select also internal resistors which provide a predetermined regulated voltage.
摘要:
In the preferred embodiment, the outputs of a plurality of analog signal generators are connected to a single wire (the analog bus). Each analog signal generator is addressable by a unique code provided to its respective address input terminals. A host controller selectively addresses only one of the analog signal generators such that an output of only one of the analog signal generators is applied to the analog bus at a time. In this manner, a single wire may be used to transmit a plurality of analog signals to a receiver. In one embodiment, the receiver is a MUX having an output connected to an ADC.
摘要:
A voltage detector is described herein which eliminates an entire operational amplifier or comparator from conventional voltage detectors. In one embodiment of such a voltage detector, a band gap reference generator is connected so as not to incorporate any feedback mechanism and where an off balance in the band gap reference generator is used to detect whether an input voltage falls below a threshold voltage. By eliminating the feedback path in the band gap reference generator, a comparator is eliminated. Other types of voltage detectors which provide a highly stable operation over a wide range of temperatures are described.
摘要:
A power on reset circuit continuously asserts a reset output signal to a reset logic state (e.g., RESET) during the recovery of a power supply voltage from an inoperative voltage level, e.g., zero volts, to an operative minimum voltage level. The reset circuit continues to assert the reset output to the reset Logic State for an additional, active reset interval after the power supply voltage is above the minimum operative level. At the end of the additional active reset interval, the reset output is released to an operational logic level (e.g, NOT-RESET or RESETnull). Operative logic circuits receiving the reset output signal are thus provided with the active reset interval in which to perform their built-in reset functions after the power supply level is at or above the minimum operative level. At the expiration of the active reset interval, the power on reset circuit provides the subsequent operative circuits with the NON-RESET logic state to indicate normal operation can be resumed. The power on reset circuit has no continuous current paths between power supplies (other than negligible leakage currents) other than during the recovery time.
摘要:
A short-circuit protection circuit senses the output current of an output transistor to provide a control signal to a control transistor. The control transistor, in response to the control signal, varies an input voltage to an internal stage of an amplifier driving the output transistor, so as to cause the output transistor is switched off. A hysteresis resistor is coupled in series with an input terminal of the short circuit protection circuit, so as to prevent transient noise from switching off said output transistor.
摘要:
An integrated circuit providing two output functions from a single output controlled by an input with a single switch responsive to an input level.
摘要:
A fixed and a user adjustable voltage reference is alternatively provided by an integrated switch which switches between two current sources according to an input voltage. A fixed reference voltage is achieved by amplifying the current of one of the two current sources according to a predetermined voltage difference between the output terminal and an internal reference voltage. An adjustable reference voltage is achieved by amplifying the current of other of the two current sources according to a voltage difference between the internal reference voltage and an user adjustable voltage. In one embodiment, the user adjustable voltage is achieved by a user adjustable voltage divider circuit.
摘要:
A capacitance measuring device incorporates the integrating analog-digital converter circuit of a handheld meter. The capacitance measuring device charges an unknown capacitance with a constant current until the voltage across the unknown capacitor reaches a predetermined voltage. At the same time, a reference voltage is applied to the input lead of an integrating circuit of the integrating analog-digital converter such that a corresponding proportional charge is stored in the feedback capacitor of the integrating circuit. The negative of the reference voltage is then applied to the integrating circuit so that charge is removed from the feedback capacitor at the same rate as the feedback capacitor was charged. A counter is used to determine the number of clock pulses it took to completely discharge the feedback capacitor and hence a reading of the unknown capacitance can be determined from the equation C.sub.X =I.sub.CHARGE *T.sub.2 /V.sub.TRIP.
摘要:
A buffer circuit having both high gain and high slew rate is implemented using a high gain-low slew rate amplifier and a switch network. The buffer circuit's operation is divided into three periods. During the first period, the output of the amplifier is isolated from the load to allow the amplifier's output voltage to more quickly reaches its final voltage level. During the second period, the switch network couples the amplifier output lead to the load input lead where the amplifier drives the voltage at the load's input lead to a voltage substantially equal to the voltage of the input signal. During the third period, the switch network isolates the amplifier from the load and couples the load's input lead to a source of ground potential to quickly slew the load's input lead to ground potential.