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公开(公告)号：US20120319886A1
公开(公告)日：2012-12-20
申请号：US13164478
申请日：2011-06-20
摘要： A singled-ended, successive approximation register analog-to-digital converter convert an analog input voltage to a digital representation comprising m upper order bits and a number of lower order bits. The SAR ADC comprises SAR logic, a resistive network, multiple switches, and first and second LSB capacitors. The switches also comprises two sets of switches coupled to the resistive network, each set of switches is configured to couple a selected tap to each of the first and second LSB capacitors. When determining the lower order bits, the SAR logic is configured to control the sets of switches to change the first and second taps from one cycle in which one of the lower order bits is determined to a next cycle in which the next of the lower order bits is determined so that the voltage of both taps changes by a decreasing amount with each succeeding bit being determined.
摘要翻译： 单端逐次逼近寄存器模数转换器将模拟输入电压转换成包括m个高位位和多个低位位的数字表示。 SAR ADC包括SAR逻辑，电阻网络，多个开关以及第一和第二LSB电容。 开关还包括耦合到电阻网络的两组开关，每组开关被配置为将所选择的抽头耦合到第一和第二LSB电容器中的每一个。 当确定低阶位时，SAR逻辑被配置为控制开关组，以将第一和第二抽头从其中一个较低位确定的下一个周期改变为下一个较低阶的下一个周期 确定位，使得两个抽头的电压随着每个后续位被确定而减小量。
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公开(公告)号：US08395538B2
公开(公告)日：2013-03-12
申请号：US13164478
申请日：2011-06-20
IPC分类号： H03M1/34
摘要： A singled-ended, successive approximation register analog-to-digital converter convert an analog input voltage to a digital representation comprising m upper order bits and a number of lower order bits. The SAR ADC comprises SAR logic, a resistive network, multiple switches, and first and second LSB capacitors. The switches also comprises two sets of switches coupled to the resistive network, each set of switches is configured to couple a selected tap to each of the first and second LSB capacitors. When determining the lower order bits, the SAR logic is configured to control the sets of switches to change the first and second taps from one cycle in which one of the lower order bits is determined to a next cycle in which the next of the lower order bits is determined so that the voltage of both taps changes by a decreasing amount with each succeeding bit being determined.
摘要翻译： 单端逐次逼近寄存器模数转换器将模拟输入电压转换成包括m个高位位和多个低位位的数字表示。 SAR ADC包括SAR逻辑，电阻网络，多个开关以及第一和第二LSB电容。 开关还包括耦合到电阻网络的两组开关，每组开关被配置为将所选择的抽头耦合到第一和第二LSB电容器中的每一个。 当确定低阶位时，SAR逻辑被配置为控制开关组，以将第一和第二抽头从其中一个较低位确定的下一个周期改变为下一个较低阶的下一个周期 确定位，使得两个抽头的电压随着每个后续位被确定而减小量。
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