-
公开(公告)号：US09148155B1
公开(公告)日：2015-09-29
申请号：US14248332
申请日：2014-04-08
Applicant: Amit Aggarwal , Himanshu Goel , Ashish Malhotra , Ankit Pal
Inventor： Amit Aggarwal , Himanshu Goel , Ashish Malhotra , Ankit Pal
Abstract: An integrated circuit (IC) includes multiple circuit modules that have specific clocking requirements, multiple clock sources (e.g., PLLs, duty cycle re-shaper, etc.), and at least one clock input port. The clock sources have specific clock source specifications, and the circuit modules have specific clocking requirements. The clock sources are selected based on an identification of the most common clocking requirements, and then placed at routing distances measured from the input port that are less than corresponding predetermined maximum routing distances such that the clocking requirements of the circuit modules are met. The IC thus generates clock signals internally, rather than externally.
Abstract translation: 集成电路（IC）包括具有特定时钟要求的多个电路模块，多个时钟源（例如，PLL，占空比重新整形器等）以及至少一个时钟输入端口。 时钟源具有特定的时钟源规格，电路模块具有特定的时钟要求。 基于最常见的时钟要求的识别来选择时钟源，然后将其从输入端口测量的路由距离设置为小于相应的预定最大路由距离，使得满足电路模块的时钟要求。 因此，IC在内部而不是外部产生时钟信号。
-
公开(公告)号：US20150362970A1
公开(公告)日：2015-12-17
申请号：US14568074
申请日：2014-12-11
Applicant: Amit Aggarwal , Rohit Gupta , Ashish Malhotra , Andrey Malkov , Evgeny A. Shevchenko
Inventor： Amit Aggarwal , Rohit Gupta , Ashish Malhotra , Andrey Malkov , Evgeny A. Shevchenko
Abstract: An integrated circuit (IC) includes a first I/O cell, a logic cell, a trigger signal generation circuit, and a second I/O cell having a voltage selection pin. I/O interfaces of the first I/O cell receive first and second supply voltages, respectively, and I/O interfaces of the second I/O cell receive third and fourth supply voltages, respectively. The first I/O cell generates a first trigger signal when the first supply voltage reaches a first predetermined voltage. The logic cell receives the first trigger signal and generates a safe-state signal. The trigger signal generation circuit generates a second trigger signal when the third supply voltage reaches a second predetermined voltage. The voltage selection pin receives the safe-state signal and the second trigger signal and sets the second I/O cell in a safe-state mode, which protects the second I/O cell from over voltage damage.
Abstract translation: 集成电路（IC）包括第一I / O单元，逻辑单元，触发信号生成电路和具有电压选择引脚的第二I / O单元。 第一I / O单元的I / O接口分别接收第一和第二电源电压，第二I / O单元的I / O接口分别接收第三和第四电源电压。 当第一电源电压达到第一预定电压时，第一I / O单元产生第一触发信号。 逻辑单元接收第一触发信号并产生安全状态信号。 当第三电源电压达到第二预定电压时，触发信号产生电路产生第二触发信号。 电压选择引脚接收安全状态信号和第二触发信号，并将第二I / O单元设置为安全状态模式，保护第二I / O单元免受过电压损坏。
-
公开(公告)号：US08660983B2
公开(公告)日：2014-02-25
申请号：US12915568
申请日：2010-10-29
Applicant: Amit Aggarwal , Ruchin Chandra , Apoorva Aggarwal , Parul Ranvir Singh , Guni Brar
Inventor： Amit Aggarwal , Ruchin Chandra , Apoorva Aggarwal , Parul Ranvir Singh , Guni Brar
IPC: G06F17/30
CPC classification number: G06Q10/06
Abstract: A method and system for using a data warehouse to improve results of enterprise level processes are provided. The data warehouse typically includes industry-wide empirical data relating to corresponding operational practices, metrics, and outcomes. The method focuses on actual process results by taking a holistic, end-to-end view of the process in conjunction with using the data in the data warehouse to enable effective process improvements.
Abstract translation: 提供了一种使用数据仓库改进企业级流程结果的方法和系统。 数据仓库通常包括与相应的操作实践，指标和结果相关的全行业经验数据。 该方法重点关注实际过程结果，通过结合使用数据仓库中的数据来实现整个过程的端到端视图，以实现有效的流程改进。
-
4.发明申请公开(公告)号：US20110238616A1
公开(公告)日：2011-09-29
申请号：US12915568
申请日：2010-10-29
Applicant: AMIT AGGARWAL , Ruchin Chandra , Apoorva Aggarwal , Parul Ranvir Singh , Guni Brar
Inventor： AMIT AGGARWAL , Ruchin Chandra , Apoorva Aggarwal , Parul Ranvir Singh , Guni Brar
IPC: G06F17/30
CPC classification number: G06Q10/06
Abstract: A method and system for using a data warehouse to improve results of enterprise level processes are provided. The data warehouse typically includes industry-wide empirical data relating to corresponding operational practices, metrics, and outcomes. The method focuses on actual process results by taking a holistic, end-to-end view of the process in conjunction with using the data in the data warehouse to enable effective process improvements.
Abstract translation: 提供了一种使用数据仓库改进企业级流程结果的方法和系统。 数据仓库通常包括与相应的操作实践，指标和结果相关的全行业经验数据。 该方法重点关注实际过程结果，通过结合使用数据仓库中的数据来实现整个过程的端到端视图，以实现有效的流程改进。
-
公开(公告)号：US20080147669A1
公开(公告)日：2008-06-19
申请号：US11611113
申请日：2006-12-14
Applicant: Tie-Yan Liu , Bin Gao , Guoyang Shen , Wei-Ying Ma , Amit Aggarwal
Inventor： Tie-Yan Liu , Bin Gao , Guoyang Shen , Wei-Ying Ma , Amit Aggarwal
IPC: G06F17/30
CPC classification number: G06F16/951
Abstract: A method and system for determining whether a web site is a spam web site based on analysis of changes in link information over time is provided. A spam detection system collects link information for a web site at various times. The spam detection system extracts one or more features from the link information that relate to changes in the link information over time. The spam detection system then generates an indication of whether the web site is a spam web site using a classifier that has been trained to detect whether the extracted feature indicates that the web site is likely to be spam.
Abstract translation: 提供一种用于基于对随着时间的链接信息的变化的分析来确定网站是否是垃圾网站的方法和系统。 垃圾邮件检测系统在不同时间收集网站的链接信息。 垃圾邮件检测系统从与链接信息随时间变化相关的链接信息中提取一个或多个特征。 然后，垃圾邮件检测系统使用已经被训练来检测所提取的特征是否指示该网站可能是垃圾邮件的分类器来生成网站是否是垃圾邮件网站的指示。
-
Patent Agency Ranking
公开(公告)号：US20070242601A1
公开(公告)日：2007-10-18
申请号：US11404199
申请日：2006-04-14
Applicant: Abolade Gbadegesin , Amit Aggarwal , David Thaler
Inventor： Abolade Gbadegesin , Amit Aggarwal , David Thaler
CPC classification number: H04L12/5692 , H04L69/32
Abstract: A networked computer system in which a gateway is selected for efficient transmission over a network using a layered protocol. When a transmission over the network fails, information at multiple protocol layers indicates the usability of the gateway through which the failed transmission was made. In a layered protocol with an application or connection layer, a path layer and a link layer, information at the link layer is used to determine whether retransmission through the same gateway should be attempted. Information at the path layer is used to determine whether the gateway is faulty. Information from the application or connection layer is used to determine whether responses are received to transmissions. These determinations are used in setting the status of the gateway, which in turn is used to prioritize gateways when selecting a gateway for future transmissions. The system also temporarily raises the priority associated with a gateway so that it will be used in a transmission, which can reveal that the state of the gateway should be changed.
Abstract translation: 网络计算机系统，其中选择网关以使用分层协议通过网络进行有效传输。 当网络上的传输失败时，多个协议层的信息表示发生故障传输的网关的可用性。 在具有应用或连接层，路径层和链路层的分层协议中，使用链路层处的信息来确定是否应该尝试通过相同网关的重传。 路径层的信息用于确定网关是否有故障。 来自应用或连接层的信息用于确定响应是否被接收到传输。 这些确定用于设置网关的状态，网关的状态又用于在选择网关以进行将来传输时对网关进行优先级排序。 该系统还临时提高与网关相关联的优先级，以便将其用于传输中，这可以揭示网关的状态应该被改变。
-
7.发明申请公开(公告)号：US20060056303A1
公开(公告)日：2006-03-16
申请号：US10941521
申请日：2004-09-14
Applicant: Amit Aggarwal , Shrinath Honnavalli , Ashok Kumar , Venkatesh Dattathri , Sahil Bhardwaj , Sumeet Arora , Nimish Bhatt
Inventor： Amit Aggarwal , Shrinath Honnavalli , Ashok Kumar , Venkatesh Dattathri , Sahil Bhardwaj , Sumeet Arora , Nimish Bhatt
IPC: H04L12/26
CPC classification number: H04L45/00 , H04L41/0668 , H04L41/0677 , H04L43/00 , H04L43/10 , H04L43/16
Abstract: Methods and systems for monitoring a data path on a network routing device are described. The data path includes a plurality of devices on the network routing device and an interface. Data packets are moved on the network routing device using the devices and communicated to and from a network via the interface. A process for detecting a defective device on the network routing device is executed. The process is a self-contained process that is executed within the data path, allowing a defect in the data path to be detected, localized and recovered from.
-
公开(公告)号：US11062348B1
公开(公告)日：2021-07-13
申请号：US13460745
申请日：2012-04-30
Applicant: David Thacker , David Hoover , Anthony Caliendo , Ruslan Gilfanov , Amit Aggarwal
Inventor： David Thacker , David Hoover , Anthony Caliendo , Ruslan Gilfanov , Amit Aggarwal
IPC: G06Q30/02
Abstract: A sales enhancement system and method is disclosed. The sales enhancement system is configured to use one or more deal program collections, which are groupings or compilations of deal programs. The sales enhancement system manages deal programs in the deal program collections at various stages of use including: associating a deal program with multiple deal program collections; determining the number of deals to assign to the different deal programs; using triggers to select which deal program collections to access; transmitting an offer for a deal; and processing acceptances of the offers.
-
公开(公告)号：US09383794B2
公开(公告)日：2016-07-05
申请号：US14568074
申请日：2014-12-11
Applicant: Amit Aggarwal , Rohit Gupta , Ashish Malhotra , Andrey Malkov , Evgeny A. Shevchenko
Inventor： Amit Aggarwal , Rohit Gupta , Ashish Malhotra , Andrey Malkov , Evgeny A. Shevchenko
Abstract: An integrated circuit (IC) includes a first I/O cell, a logic cell, a trigger signal generation circuit, and a second I/O cell having a voltage selection pin. I/O interfaces of the first I/O cell receive first and second supply voltages, respectively, and I/O interfaces of the second I/O cell receive third and fourth supply voltages, respectively. The first I/O cell generates a first trigger signal when the first supply voltage reaches a first predetermined voltage. The logic cell receives the first trigger signal and generates a safe-state signal. The trigger signal generation circuit generates a second trigger signal when the third supply voltage reaches a second predetermined voltage. The voltage selection pin receives the safe-state signal and the second trigger signal and sets the second I/O cell in a safe-state mode, which protects the second I/O cell from over voltage damage.
Abstract translation: 集成电路（IC）包括第一I / O单元，逻辑单元，触发信号生成电路和具有电压选择引脚的第二I / O单元。 第一I / O单元的I / O接口分别接收第一和第二电源电压，第二I / O单元的I / O接口分别接收第三和第四电源电压。 当第一电源电压达到第一预定电压时，第一I / O单元产生第一触发信号。 逻辑单元接收第一触发信号并产生安全状态信号。 当第三电源电压达到第二预定电压时，触发信号产生电路产生第二触发信号。 电压选择引脚接收安全状态信号和第二触发信号，并将第二I / O单元设置为安全状态模式，保护第二I / O单元免受过电压损坏。
-
公开(公告)号：US20150288366A1
公开(公告)日：2015-10-08
申请号：US14248332
申请日：2014-04-08
Applicant: Amit Aggarwal , Himanshu Goel , Ashish Malhotra , Ankit Pal
Inventor： Amit Aggarwal , Himanshu Goel , Ashish Malhotra , Ankit Pal
Abstract: An integrated circuit (IC) includes multiple circuit modules that have specific clocking requirements, multiple clock sources (e.g., PLLs, duty cycle re-shaper, etc.), and at least one clock input port. The clock sources have specific clock source specifications, and the circuit modules have specific clocking requirements. The clock sources are selected based on an identification of the most common clocking requirements, and then placed at routing distances measured from the input port that are less than corresponding predetermined maximum routing distances such that the clocking requirements of the circuit modules are met. The IC thus generates clock signals internally, rather than externally.
Abstract translation: 集成电路（IC）包括具有特定时钟要求的多个电路模块，多个时钟源（例如，PLL，占空比重新整形器等）以及至少一个时钟输入端口。 时钟源具有特定的时钟源规格，电路模块具有特定的时钟要求。 基于最常见的时钟要求的识别来选择时钟源，然后将其从输入端口测量的路由距离设置为小于相应的预定最大路由距离，使得满足电路模块的时钟要求。 因此，IC在内部而不是外部产生时钟信号。
-
-
-
-
-
-
-
-
-
Search Results
14
records
(took 0.016 seconds)
