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    Low-Doped Semi-Insulating Sic Crystals and Method
    3.
    发明申请
    Low-Doped Semi-Insulating Sic Crystals and Method 审中-公开
    低掺杂半绝缘矽晶体和方法

    公开(公告)号：US20080190355A1

    公开(公告)日：2008-08-14

    申请号：US11629584

    申请日：2005-07-06

    申请人： Jihong Chen ,  Ilya Zwieback ,  Avinash K. Gupta ,  Donovan L. Barrett ,  Richard H. Hopkins ,  Edward Semenas ,  Thomas A. Anderson ,  Andrew E. Souzis

    发明人： Jihong Chen ,  Ilya Zwieback ,  Avinash K. Gupta ,  Donovan L. Barrett ,  Richard H. Hopkins ,  Edward Semenas ,  Thomas A. Anderson ,  Andrew E. Souzis

    IPC分类号： C30B33/02 ,  H01B1/02

    CPC分类号： H01L29/1608 ,  C30B23/00 ,  C30B29/36 ,  H01L21/02378 ,  H01L21/02529 ,  H01L21/02581 ,  H01L21/02631

    摘要： The invention relates to substrates of semi-insulating silicon carbide used for semiconductor devices and a method for making the same. The substrates have a resistivity above 106 Ohm-cm, and preferably above 108 Ohm-cm, and most preferably above 109 Ohm-cm, and a capacitance below 5 pF/mm2 and preferably below 1 pF/mm2. The electrical properties of the substrates are controlled by a small amount of added deep level impurity, large enough in concentration to dominate the electrical behavior, but small enough to avoid structural defects. The substrates have concentrations of unintentional background impurities, including shallow donors and acceptors, purposely reduced to below 5·1016 cm−3, and preferably to below 1·1016 cm−3, and the concentration of deep level impurity is higher, and preferably at least two times higher, than the difference between the concentrations of shallow acceptors and shallow donors. The deep level impurity comprises one of selected metals from the periodic groups IB, IIB, IIIB, IVB, VB, VIB, VIIB and VIIIB. Vanadium is a preferred deep level element. In addition to controlling the resistivity and capacitance, a further advantage of the invention is an increase in electrical uniformity over the entire crystal and reduction in the density of crystal defects.

    摘要翻译： 本发明涉及用于半导体器件的半绝缘碳化硅的衬底及其制造方法。 基板的电阻率高于106欧姆 - 厘米，优选高于108欧姆 - 厘米，最优选高于109欧姆 - 厘米，电容低于5 pF / mm2，最好低于1 pF / mm2。 基板的电学特性由少量的加入的深度杂质控制，其浓度足够大以控制电气行为，但足够小以避免结构缺陷。 底物具有无意的背景杂质浓度，包括浅供体和受体，故意降低至5.1016cm-3以下，优选低于1.1016cm-3，深层杂质的浓度较高，优选至少高两倍 ，比浅受体和浅供体的浓度之间的差异。 深层杂质包括选自周期性基团IB，IIB，IIIB，IVB，VB，VIB，VIIB和VIIIB的金属之一。 钒是首选的深层元素。 除了控制电阻率和电容之外，本发明的另一个优点是在整个晶体上的电均匀性的增加和晶体缺陷密度的降低。