公开(公告)号：US20130246730A1

公开(公告)日：2013-09-19

申请号：US13603697

申请日：2012-09-05

申请人： Ayako YAMANO ,  Teruo Takagiwa ,  Koichi Fukuda ,  Hitoshi Shiga ,  Osamu Nagao

发明人： Ayako YAMANO ,  Teruo Takagiwa ,  Koichi Fukuda ,  Hitoshi Shiga ,  Osamu Nagao

IPC分类号： G06F12/08

CPC分类号： G06F12/0891 ,  G06F12/0246 ,  G06F2212/7209 ,  G11C11/5635 ,  G11C16/00 ,  G11C16/16 ,  Y02D10/13

摘要： According to one embodiment, a semiconductor memory device includes a plurality of blocks in a memory cell, each of the blocks acting as an erasure unit of data, the block including a plurality of pages, each of the pages including a plurality of memory cell transistors, each of the memory cell transistors being configured to be an erasure state or a first retention state based on a threshold voltage of the memory cell transistor, and a controller searching data in the block with respect to, writing a first flag denoting effective into a prescribed page of the block with the erasure state, and writing the first flag denoting non-effective into a prescribed page of the block with the first retention state, reading out the prescribed page of the block with the first retention state, and determining that the block is writable when the first flag denotes effective.

摘要翻译： 根据一个实施例，半导体存储器件包括存储器单元中的多个块，每个块用作数据的擦除单元，该块包括多个页，每个页包括多个存储单元晶体管 每个存储单元晶体管被配置为基于存储单元晶体管的阈值电压的擦除状态或第一保持状态，以及控制器搜索块中的数据，将表示有效的第一标志写入到 具有擦除状态的块的规定页面，并且将表示无效的第一标志写入具有第一保持状态的块的规定页面，以第一保留状态读出块的规定页面，并且确定 当第一个标志表示有效时，块是可写的。

公开(公告)号：US20120243330A1

公开(公告)日：2012-09-27

申请号：US13315516

申请日：2011-12-09

申请人： Ayako YAMANO ,  Osamu Nagao ,  Toshiaki Edahiro

发明人： Ayako YAMANO ,  Osamu Nagao ,  Toshiaki Edahiro

IPC分类号： G11C16/14

CPC分类号： G11C16/14 ,  G11C11/5635 ,  G11C16/0483 ,  G11C16/3409 ,  G11C16/344

摘要： A nonvolatile semiconductor storage device according to an embodiment includes an erase circuit executing an erase sequence, wherein in the erase sequence, the erase circuit executes: an erase operation to change a selection memory cell group to an erased state, after the erase operation, a soft program operation on the selection memory cell group to solve over-erased state, and after the soft program operation, a first soft program verification operation performed on at least one partial selection memory cell group of a first partial selection memory cell group and a second partial selection memory cell group so as to confirm whether the partial selection memory cell group includes a predetermined number of memory cells or more that have threshold values equal to or more than a predetermined first threshold value, and after the first soft program verification operation.

摘要翻译： 根据实施例的非易失性半导体存储装置包括执行擦除序列的擦除电路，其中在擦除序列中，擦除电路执行：在擦除操作之后将选择存储单元组改变为擦除状态的擦除操作， 对选择存储单元组进行软编程操作以解决过擦除状态，并且在软编程操作之后，对第一部分选择存储单元组和第二部分选择存储单元组的至少一个部分选择存储单元组执行第一软程序验证操作 部分选择存储单元组，以确认部分选择存储单元组是否包括具有等于或大于预定第一阈值的阈值的预定数量的存储单元或更多个，以及在第一软程序验证操作之后。

公开(公告)号：US09003105B2

公开(公告)日：2015-04-07

申请号：US13603697

申请日：2012-09-05

申请人： Ayako Yamano ,  Teruo Takagiwa ,  Koichi Fukuda ,  Hitoshi Shiga ,  Osamu Nagao

发明人： Ayako Yamano ,  Teruo Takagiwa ,  Koichi Fukuda ,  Hitoshi Shiga ,  Osamu Nagao

IPC分类号： G06F12/08 ,  G06F12/02 ,  G11C16/00 ,  G11C11/56 ,  G11C16/16

CPC分类号： G06F12/0891 ,  G06F12/0246 ,  G06F2212/7209 ,  G11C11/5635 ,  G11C16/00 ,  G11C16/16 ,  Y02D10/13

摘要： According to one embodiment, a semiconductor memory device includes a plurality of blocks in a memory cell, each of the blocks acting as an erasure unit of data, the block including a plurality of pages, each of the pages including a plurality of memory cell transistors, each of the memory cell transistors being configured to be an erasure state or a first retention state based on a threshold voltage of the memory cell transistor, and a controller searching data in the block with respect to, writing a first flag denoting effective into a prescribed page of the block with the erasure state, and writing the first flag denoting non-effective into a prescribed page of the block with the first retention state, reading out the prescribed page of the block with the first retention state, and determining that the block is writable when the first flag denotes effective.

摘要翻译： 根据一个实施例，半导体存储器件包括存储器单元中的多个块，每个块用作数据的擦除单元，该块包括多个页，每个页包括多个存储单元晶体管 每个存储单元晶体管被配置为基于存储单元晶体管的阈值电压的擦除状态或第一保持状态，以及控制器搜索块中的数据，将表示有效的第一标志写入到 具有擦除状态的块的规定页面，并且将表示无效的第一标志写入具有第一保持状态的块的规定页面，以第一保留状态读出块的规定页面，并且确定 当第一个标志表示有效时，块是可写的。

公开(公告)号：US08482985B2

公开(公告)日：2013-07-09

申请号：US13315516

申请日：2011-12-09

申请人： Ayako Yamano ,  Osamu Nagao ,  Toshiaki Edahiro

发明人： Ayako Yamano ,  Osamu Nagao ,  Toshiaki Edahiro

IPC分类号： G11C16/06

CPC分类号： G11C16/14 ,  G11C11/5635 ,  G11C16/0483 ,  G11C16/3409 ,  G11C16/344

摘要： A nonvolatile semiconductor storage device according to an embodiment includes an erase circuit executing an erase sequence, wherein in the erase sequence, the erase circuit executes: an erase operation to change a selection memory cell group to an erased state, after the erase operation, a soft program operation on the selection memory cell group to solve over-erased state, and after the soft program operation, a first soft program verification operation performed on at least one partial selection memory cell group of a first partial selection memory cell group and a second partial selection memory cell group so as to confirm whether the partial selection memory cell group includes a predetermined number of memory cells or more that have threshold values equal to or more than a predetermined first threshold value, and after the first soft program verification operation.

摘要翻译： 根据实施例的非易失性半导体存储装置包括执行擦除序列的擦除电路，其中在擦除序列中，擦除电路执行：在擦除操作之后将选择存储单元组改变为擦除状态的擦除操作， 对选择存储单元组进行软编程操作以解决过擦除状态，并且在软编程操作之后，对第一部分选择存储单元组和第二部分选择存储单元组的至少一个部分选择存储单元组执行第一软程序验证操作 部分选择存储单元组，以确认部分选择存储单元组是否包括具有等于或大于预定第一阈值的阈值的预定数量的存储单元或更多个，以及在第一软程序验证操作之后。