摘要:
A three-dimensional (3D) semiconductor memory device includes a stack structure, a channel structure, and a vertical insulator. The stack structure includes gate patterns and insulating patterns which are alternately and repeatedly stacked on a substrate. A channel structure penetrates the stack structure and is connected to the substrate. A vertical insulator includes a high-k dielectric layer. The vertical insulator is covered by the channel structure and the high-k dielectric pattern of the vertical insulator is in contact with the gate patterns.
摘要:
A semiconductor device has a vertical channel and includes a first tunnel insulating layer adjacent to a blocking insulating layer, a third tunnel insulating layer adjacent to a channel pillar, and a second tunnel insulating layer between the first and third tunnel insulating layers. The energy band gap of the third tunnel insulating layer is smaller than that of the first tunnel insulating layer and is larger than that of the second tunnel insulating layer.
摘要:
A semiconductor device has a vertical channel and includes a first tunnel insulating layer adjacent to a blocking insulating layer, a third tunnel insulating layer adjacent to a channel pillar, and a second tunnel insulating layer between the first and third tunnel insulating layers. The energy band gap of the third tunnel insulating layer is smaller than that of the first tunnel insulating layer and is larger than that of the second tunnel insulating layer.