Recirculating RMS AC conversion method and apparatus
    1.
    发明授权
    Recirculating RMS AC conversion method and apparatus 失效
    再循环RMS交流转换方法及装置

    公开(公告)号:US4274143A

    公开(公告)日:1981-06-16

    申请号:US62923

    申请日:1979-08-02

    CPC分类号: G01R19/03

    摘要: A signal whose RMS value is to be accurately determined is first converted into DC form by a relatively inaccurate RMS converter, such as a thermal RMS converter (15). The result is a first converter signal (Y.sub.1), which is stored for recirculation in a suitable device, such as a sample and hold circuit (17). The first converter signal is also doubled (2Y.sub.1) and stored (41). Thereafter the first converter signal stored in the storage device is recirculated to the converter to create a second converter signal (Y.sub.2). Then, the second converter signal is subtracted (43) from the doubled first converter (2Y.sub.1 -Y.sub.2) to produce a highly accurate RMS output signal.

    摘要翻译: 要准确确定其RMS值的信号首先通过诸如热均值转换器(15)的相对不精确的RMS转换器转换成DC形式。 结果是第一转换器信号(Y1),其被存储用于在诸如采样和保持电路(17)的适当装置中的再循环。 第一转换器信号也加倍(2Y1)并存储(41)。 此后,存储在存储装置中的第一转换器信号被再循环到转换器以产生第二转换器信号(Y2)。 然后,从加倍的第一转换器(2Y1-Y2)中减去第二转换器信号(43),以产生高精度的RMS输出信号。

    Multiple slope analog-to-digital converter having increased linearity
    2.
    发明授权
    Multiple slope analog-to-digital converter having increased linearity 失效
    具有增加线性度的多斜率模数转换器

    公开(公告)号:US5565869A

    公开(公告)日:1996-10-15

    申请号:US288416

    申请日:1994-08-09

    IPC分类号: H03M1/16 H03M1/52

    CPC分类号: H03M1/162 H03M1/52

    摘要: A multiple slope integrating analog-to-digital converter (ADC) includes an integrator and a comparator in which an input voltage to be measured is applied to a summing node at the input of the integrator during an integrate cycle, while at the same time positive and negative reference currents are selectively applied to the summing node by a controller which monitors the output of the comparator in order to come as close as possible to nulling the voltage magnitude at the output of the integrator. A controller keeps track of the charge that has been added to and removed from the integrator during the integrate cycle, and provides a coarse conversion value. The residual voltage is de-integrated to provide a fine conversion value, which is added to the coarse conversion value to provide a final value.The switches which control selection of the positive and negative reference currents are implemented and operated in such a way that linear error due to current injected into the integrator is minimized, and increased conversion speed is exhibited. At any given time during the integrate cycle, only one switch at a time is ON.

    摘要翻译: 集成模数转换器(ADC)的多重斜率包括积分器和比较器,其中待测量的输入电压在积分周期内被加到积分器输入端的求和节点,同时为正 并且负参考电流由监控比较器的输出的控制器选择性地施加到求和节点,以便尽可能接近于积分器的输出处的电压幅值。 控制器跟踪在积分周期内已经加入积分器和从积分器中移除的电荷,并提供粗转换值。 剩余电压被去积分以提供精细转换值,其被加到粗转换值以提供最终值。 控制正参考电流和负参考电流选择的开关以这样的方式被实现和操作,使得由于注入到积分器中的电流引起的线性误差被最小化,并且显示出提高的转换速度。 在集成周期中的任何给定时间,每次只有一个开关为ON。

    AC Resistor attenuator and associated amplifier circuits
    3.
    发明授权
    AC Resistor attenuator and associated amplifier circuits 失效
    交流电阻衰减器和相关放大器电路

    公开(公告)号:US4412183A

    公开(公告)日:1983-10-25

    申请号:US194137

    申请日:1980-10-06

    CPC分类号: H03H11/24 H03G3/04 H03H7/24

    摘要: An AC resistor attenuator with low parasitic capacitance coupling and, thus, a substantially constant attenuation value over a relatively wide frequency range is disclosed. The AC resistor attenuator comprises a first elongate resistor substantially entirely surrounded by a second elongate resistor. The first and second elongate resistors are thermally matched and have a substantially identical resistance profile. The first and second resistors are connected in series. The other ends of the first and second resistors are connected across the source of the signal to be attenuated. The attenuated signal is obtained at the junction between the first and second resistors. Except in the case where fifty percent (50%) attenuation is to be provided, the higher value resistance of the attenuator forms the first resistor and the lower value forms the second resistor. Preferably, the first resistor is a finely distributed thin film resistor on a suitable dielectric substrate; and, the second resistor is formed of two elements, each comprising a finely distributed thin film resistor on a suitable dielectric substrate. The two elements are mounted on opposite sides of the substrate supporting the first resistor. Alternative embodiments include further resistors positioned so as to surround the first and second resistors (and other inner resistors) in the same manner as the second resistor surrounds the first resistor. Regardless of form, the external resistors reduce parasitic capacitive coupling (i.e., coupling to surrounding items) to the inner resistors. As a result, the attenuation value remains the same over a wide frequency range. In addition to being used as a simple AC resistance attenuator, the AC resistor attenuator is also used in feedback and other amplifier systems to provide improved amplifier systems having an amplification value that remains constant over a relatively wide frequency range.

    摘要翻译: 公开了一种具有低寄生电容耦合并因此在较宽频率范围内基本上恒定的衰减值的交流电阻衰减器。 AC电阻衰减器包括基本上完全由第二细长电阻器包围的第一细长电阻器。 第一和第二细长电阻器是热匹配的并且具有基本相同的电阻分布。 第一和第二电阻串联连接。 第一和第二电阻器的另一端连接在待衰减信号的源极上。 衰减信号在第一和第二电阻之间的接合处获得。 除了要提供百分之五十(50%)的衰减的情况之外,衰减器的较高的电阻值形成第一个电阻,较低的值形成​​第二个电阻。 优选地,第一电阻器是在合适的电介质基板上的精细分布的薄膜电阻器; 并且第二电阻器由两个元件形成,每个元件在合适的电介质基板上包括精细分布的薄膜电阻器。 两个元件安装在支撑第一电阻器的基板的相对侧上。 替代实施例包括以与第二电阻器围绕第一电阻器相同的方式定位成围绕第一和第二电阻器(和其它内部电阻器)的另外的电阻器。 无论形式如何,外部电阻器将内部电阻器的寄生电容耦合减少(即耦合到周围项目)。 结果,衰减值在宽频率范围内保持相同。 除了用作简单的AC电阻衰减器之外,AC电阻衰减器还用于反馈和其他放大器系统,以提供具有在相对宽的频率范围内保持恒定的放大值的改进的放大器系统。

    Sample and hold circuit
    4.
    发明授权
    Sample and hold circuit 失效
    采样保持电路

    公开(公告)号:US4302689A

    公开(公告)日:1981-11-24

    申请号:US62922

    申请日:1979-08-02

    IPC分类号: G11C27/02

    CPC分类号: G11C27/026

    摘要: A sample and hold (S/H) circuit that produces an output signal having essentially zero offset voltage error is disclosed. The S/H circuit includes a pair of operational amplifiers (OA3 and OA4) that are connected in circuit during both the sample and the hold modes of operation. In the sample mode of operation one of the operational amplifiers (OA3) receives the incoming signal through a first resistor (R1) and in accordance therewith controls the magnitude of an inverted voltage stored on a storage capacitor (C1); and, the other operational amplifier (OA4) senses the stored inverted voltage and, in accordance therewith, applies a feedback voltage to the signal input of OA3 through a second resistor (R2). In the hold mode of operation OA4 senses the voltage stored on C1 and, in accordance therewith, via R2 and OA3 controls the output voltage, which has the correct polarity due to the inverted voltage being inverted by OA3. In addition, during the hold mode of operation, the output voltage is fed back through R1 to the input of OA3 receiving the output of OA4. If the resistance of R1 equals the resistance of R2, the magnitude of the voltage stored by C1 is equal to the input signal voltage. If the resistance ratio of R2 to R1 is greater than one, the magnitude of the stored voltage is greater than the input signal voltage, even though the output voltage is equal to the input signal voltage. Storing a higher level voltage reduces the effect of capacitor leakage and OA4 drawing current from C1 on the output voltage.

    摘要翻译: 公开了一种采样和保持(S / H)电路,其产生具有零偏移电压误差的输出信号。 S / H电路包括在采样和保持操作模式期间连接在电路中的一对运算放大器(OA3和OA4)。 在采样操作模式中,运算放大器(OA3)中的一个通过第一电阻(R1)接收输入信号,并据此控制存储在存储电容器(C1)上的反相电压的大小; 并且另一个运算放大器(OA4)感测存储的反相电压,并且根据此,通过第二电阻器(R2)向OA3的信号输入端施加反馈电压。 在保持操作模式OA4中,感测存储在C1上的电压,并且根据经由R2和OA3控制由于反相电压被OA3反转而具有正确极性的输出电压。 另外,在保持工作模式下,输出电压通过R1反馈到接收OA4输出的OA3的输入端。 如果R1的电阻等于R2的电阻,则C1存储的电压的大小等于输入信号电压。 如果R2与R1的电阻比大于1,即使输出电压等于输入信号电压,存储电压的幅度大于输入信号电压。 存储较高电平电压可降低电容器漏电和OA4从C1引出电流对输出电压的影响。

    Recirculating RMS AC conversion method and apparatus with fast mode
    5.
    发明授权
    Recirculating RMS AC conversion method and apparatus with fast mode 失效
    具有快速模式的循环RMS交流转换方法和装置

    公开(公告)号:US4360880A

    公开(公告)日:1982-11-23

    申请号:US228081

    申请日:1981-01-26

    IPC分类号: G01R15/00 G01R19/03 G01R15/10

    CPC分类号: G01R15/005 G01R19/03

    摘要: A signal whose RMS value is to be accurately determined is first converted into DC form by a relatively inaccurate RMS converter, such as a thermal RMS converter (15). The result is a first converter signal (Y.sub.1), which is stored for recirculation in a suitable storage device, such as a sample and hold circuit (17). Thereafter, the signal stored in the storage device is recirculated to the converter to create a second converter signal (Y.sub.2). Then, the second converter signal is subtracted from the doubled value of the first converter signal (2Y.sub.1 -Y.sub.2) to produce a corrected RMS signal (X). The difference between the first converter signal (Y.sub.1) and the corrected RMS signal (X) is then determined. This error signal (E) is stored. Next, a decision is made as to whether or not a fast mode of operation is to be followed. If it is not to be followed the corrected RMS signal is displayed. If the fast mode is to be followed, the signal whose RMS value is to be accurately determined is reapplied to the RMS converter. The result is a third converter signal from which the error signal is subtracted to produce a corrected signal that accurately represents the RMS value of the reapplied signal. This corrected signal is then displayed or applied to other downstream subsystems, such as signal analyzers or recorders. The fast mode steps are then repeated.

    摘要翻译: 要准确确定其RMS值的信号首先通过诸如热均值转换器(15)的相对不精确的RMS转换器转换成DC形式。 结果是第一转换器信号(Y1),其被存储用于在诸如采样和保持电路(17)的合适的存储装置中的再循环。 此后,存储在存储装置中的信号被再循环到转换器以产生第二转换器信号(Y2)。 然后,从第一转换器信号(2Y1-Y2)的加倍值中减去第二转换器信号,以产生校正的RMS信号(X)。 然后确定第一转换器信号(Y1)和校正的RMS信号(X)之间的差。 存储该误差信号(E)。 接下来,作出关于是否要遵循快速操作模式的决定。 如果不遵循,则显示校正的RMS信号。 如果要遵循快速模式,则要将RMS值准确确定的信号重新应用于RMS转换器。 结果是第三转换器信号,从其中减去误差信号以产生精确地表示重新施加的信号的RMS值的校正信号。 然后,该校正信号被显示或应用于其它下游子系统,例如信号分析器或记录器。 然后重复快速模式步骤。