摘要:
Exemplary backlight driving method and display device are provided. The display device includes a light source array. The light source array includes a first group of light-emitting rows and a second group of light-emitting rows. The backlight driving method includes the steps of: firstly, receiving a gate driving frequency of the display device; subsequently, generating a backlight driving frequency according to the gate driving frequency; and afterwards, sequentially providing a first row driving voltage to the first group of light-emitting rows in a first time period and sequentially providing a second row driving voltage to the second group of light-emitting rows in a second time period, according to the backlight driving frequency. The first time period and the second time period have different phases from each other, and the gate driving frequency is different from the backlight driving frequency.
摘要:
A flat panel display, a shift register with image retention release and method for releasing image retention are provided. An output end of the shift register couples to a gate line of a display panel. A first end of a first transistor couples to the output end of the shift register. A second end of the first transistor couples to a system voltage VDD or a reference voltage VSS. A first end of a capacitor couples to a control end of the first transistor. A second end of the capacitor couples to the reference voltage VSS. During a power-off period, the reference voltage VSS is pulled high for turning on the first transistor, therefore the voltage of the gate line is pulled high.
摘要:
Exemplary backlight driving method and display device are provided. The display device includes a light source array. The light source array includes a first group of light-emitting rows and a second group of light-emitting rows. The backlight driving method includes the steps of: firstly, receiving a gate driving frequency of the display device; subsequently, generating a backlight driving frequency according to the gate driving frequency; and afterwards, sequentially providing a first row driving voltage to the first group of light-emitting rows in a first time period and sequentially providing a second row driving voltage to the second group of light-emitting rows in a second time period, according to the backlight driving frequency. The first time period and the second time period have different phases from each other, and the gate driving frequency is different from the backlight driving frequency.
摘要:
An exemplary gate driving circuit is formed on a substrate and includes a plurality of shift register stages successively arranged on the substrate along a predetermined direction. The shift register stages are grouped into a plurality of groups and for outputting a plurality of gate driving signals. Each of the groups includes a plurality of cascade-connected the shift register stages. Time sequences of a plurality of start pulse signals inputted into the groups are different from one another. An output order of the gate driving signals is different from the arranging order of all the shift register stages.
摘要:
A naked-eye type stereoscopic display including a display panel, a polarization switching panel, and a lens array is provided. The display panel provides an image having a first polarization state. The polarization switching panel and the lens array are disposed on a propagation path of the image, and the polarization switching panel is located between the lens array and the display panel. In addition, the polarization switching panel has at least one rescue line so as to lower the scrap rate of the polarization switching panel.
摘要:
An exemplary shift register circuit includes a plurality of shift registers for sequentially outputting a plurality of driving pulse signals. Among each M number of the shift registers for sequentially outputting M number of the driving pulse signals, the shift register for lastly outputting one of the M number of driving pulse signals is enabled, by (M−1) number of start pulse signals sequentially outputted from the remained (M−1) number of the shift registers, to generate the driving pulse signal. Herein, M is a positive integer greater than 2. Moreover, a circuit structure of a shift register also is provided.
摘要:
A flat panel display, a shift register with image retention release and method for releasing image retention are provided. An output end of the shift register couples to a gate line of a display panel. A first end of a first transistor couples to the output end of the shift register. A second end of the first transistor couples to a system voltage VDD or a reference voltage VSS. A first end of a capacitor couples to a control end of the first transistor. A second end of the capacitor couples to the reference voltage VSS. During a power-off period, the reference voltage VSS is pulled high for turning on the first transistor, therefore the voltage of the gate line is pulled high.
摘要:
A shift register having individual driving nodes is disclosed. The shift register includes a first clock pull-down module, a second clock pull-down module, a key pull-down module, a self feedback module, and a driving output unit. The first clock pull-down module is used to pull-down the potential of a gate line to a low voltage when the first clock signal is in a high voltage level. The second clock signal pull-down module pulls down the potential of the gate line to the low voltage when the second clock signal is in a high voltage level. The key pull-down module rapidly pulls down the potential of the gate line to the low voltage level after the gate line outputs an output signal. The self feedback module is used to output a driving signal to the key pull-down module. The driving signal output unit outputs a next stage driving signal which is irrelative to the operation of the previous stage shift register.
摘要:
A shift register having individual driving nodes is disclosed. The shift register includes a first clock pull-down module, a second clock pull-down module, a key pull-down module, a self feedback module, and a driving output unit. The first clock pull-down module is used to pull-down the potential of a gate line to a low voltage when the first clock signal is in a high voltage level. The second clock signal pull-down module pulls down the potential of the gate line to the low voltage when the second clock signal is in a high voltage level. The key pull-down module rapidly pulls down the potential of the gate line to the low voltage level after the gate line outputs an output signal. The self feedback module is used to output a driving signal to the key pull-down module. The driving signal output unit outputs a next stage driving signal which is irrelative to the operation of the previous stage shift register.
摘要:
An exemplary display panel includes a plurality of monochrome pixels, a plurality of data lines and a plurality of control lines. Each monochrome pixel provides a specific color on the display panel. The data lines are electrically coupled to the monochrome pixels for providing the display data. The data lines includes a first data line electrically coupled to a part of the monochrome pixels, and the specific colors provided by the part of the monochrome pixels are of the same color. Besides, each of the control lines is electrically coupled to a part of the monochrome pixels for controlling the part of the monochrome pixels electrically coupled thereto whether to receive the display data from the data lines.