公开(公告)号：US20090238481A1

公开(公告)日：2009-09-24

申请号：US12368275

申请日：2009-02-09

Applicant: Chao-Tsung Huang ,  Chia-Ping Lin

Inventor： Chao-Tsung Huang ,  Chia-Ping Lin

IPC: G06K9/36

CPC classification number: H04N19/132 ,  H04N19/129 ,  H04N19/176

Abstract: A method and an apparatus for generating a coded block pattern for highpass coefficients are provided. The method includes receiving a quantized highpass coefficient (HP), wherein the HP includes a macroblock data; dividing the macroblock into a plurality of blocks; performing lapped transform (LT) operations of two stages on the said block data, concurrently calculating a plurality of coded block patterns of the blocks corresponding to all possible HP prediction directions; performing a calculation to obtain selection information of the HP prediction directions according to lowpass coefficients (LPs) generated through LT operations of the two stages; selecting a corresponding coded block pattern among the said coded block patterns according to the above-mentioned selection information of the HP prediction directions and outputting the selected coded block pattern.

Abstract translation: 提供了一种用于产生用于高通系数的编码块图案的方法和装置。 该方法包括接收量化的高通系数（HP），其中HP包括宏块数据; 将宏块划分成多个块; 对所述块数据执行两级的重叠变换（LT）操作，同时计算与所有可能的HP预测方向相对应的块的多个编码块模式; 执行计算以根据通过两级的LT操作生成的低通系数（LP）获得HP预测方向的选择信息; 根据上述HP预测方向的选择信息，在所述编码块模式中选择对应的编码块模式，并输出所选择的编码块模式。

公开(公告)号：US20090274382A1

公开(公告)日：2009-11-05

申请号：US12189814

申请日：2008-08-12

Applicant: Chia-Ping Lin ,  Chao-Tsung Huang

Inventor： Chia-Ping Lin ,  Chao-Tsung Huang

IPC: G06K9/36

CPC classification number: H04N19/93 ,  H04N19/436 ,  H04N19/44 ,  H04N19/60

Abstract: An entropy decoding circuit, an entropy decoding method, and an entropy decoding method using a pipeline manner are provided. The entropy decoding circuit includes a coefficient register unit, a first entropy decoder, a read/write control circuit, and a second entropy decoder. The first entropy decoder reads a first stream to be decoded to perform a first entropy decoding process thereupon and writes it to the coefficient register unit in an adaptive scan order through the read/write control circuit. The second entropy decoder reads a second stream to be decoded and performs a decoding process thereupon according to a normalization parameter and whether a normalized coefficient is zero or not. Meanwhile, the normalized coefficient in the coefficient register unit is read out in a fixed scan order through the read/write control circuit to complete the decoding process.

Abstract translation: 提供熵解码电路，熵解码方法和使用流水线方式的熵解码方法。 熵解码电路包括系数寄存器单元，第一熵解码器，读/写控制电路和第二熵解码器。 第一熵解码器读取待解码的第一流以执行其上的第一熵解码处理，并通过读/写控制电路以自适应扫描顺序将其写入系数寄存器单元。 第二熵解码器读取要解码的第二流，并根据归一化参数执行解码处理，以及归一化系数是否为零。 同时，通过读/写控制电路以固定扫描顺序读出系数寄存器单元中的归一化系数，以完成解码处理。

公开(公告)号：US20090245672A1

公开(公告)日：2009-10-01

申请号：US12188194

申请日：2008-08-07

Applicant: Chia-Ping Lin ,  Chao-Tsung Huang

Inventor： Chia-Ping Lin ,  Chao-Tsung Huang

IPC: G06K9/54

CPC classification number: H04N19/18 ,  H04N19/129 ,  H04N19/13 ,  H04N19/152 ,  H04N19/30

Abstract: An entropy encoding circuit having two entropy encoders is provided. A first encoding procedure performs an adaptive scan on the encoding coefficient, and the second encoding procedure performs a fixed scan on the encoding coefficient. One of the entropy encoders receives a first encoding coefficient and performs the first encoding procedure on the first encoding coefficient to output a first encoded stream data. The other entropy encoder receives a second encoding coefficient and a normalization signal and performs the second encoding procedure on the second encoding coefficient according to the normalization signal to output a second encoded stream data. The entropy encoding circuit alternatively outputs the first encoded stream data and the second encoded stream data.

Abstract translation: 提供了具有两个熵编码器的熵编码电路。 第一编码过程对编码系数执行自适应扫描，并且第二编码过程对编码系数执行固定扫​​描。 一个熵编码器接收第一编码系数并对第一编码系数执行第一编码过程，以输出第一编码流数据。 另一个熵编码器接收第二编码系数和归一化信号，并根据归一化信号对第二编码系数执行第二编码过程，以输出第二编码流数据。 熵编码电路交替地输出第一编码流数据和第二编码流数据。

公开(公告)号：USD413986S

公开(公告)日：1999-09-14

申请号：US086384

申请日：1998-04-13

Applicant: Chia-Ping Lin

Designer： Chia-Ping Lin

公开(公告)号：US08233729B2

公开(公告)日：2012-07-31

申请号：US12368275

申请日：2009-02-09

Applicant: Chao-Tsung Huang ,  Chia-Ping Lin

Inventor： Chao-Tsung Huang ,  Chia-Ping Lin

IPC: G06K9/36

CPC classification number: H04N19/132 ,  H04N19/129 ,  H04N19/176

Abstract: A method and an apparatus for generating a coded block pattern for highpass coefficients are provided. The method includes receiving a quantized highpass coefficient (HP), wherein the HP includes a macroblock data; dividing the macroblock into a plurality of blocks; performing lapped transform (LT) operations of two stages on the said block data, concurrently calculating a plurality of coded block patterns of the blocks corresponding to all possible HP prediction directions; performing a calculation to obtain selection information of the HP prediction directions according to lowpass coefficients (LPs) generated through LT operations of the two stages; selecting a corresponding coded block pattern among the said coded block patterns according to the above-mentioned selection information of the HP prediction directions and outputting the selected coded block pattern.

Abstract translation: 提供了一种用于产生用于高通系数的编码块图案的方法和装置。 该方法包括接收量化的高通系数（HP），其中HP包括宏块数据; 将宏块划分成多个块; 对所述块数据执行两级的重叠变换（LT）操作，同时计算与所有可能的HP预测方向相对应的块的多个编码块模式; 执行计算以根据通过两级的LT操作生成的低通系数（LP）获得HP预测方向的选择信息; 根据上述HP预测方向的选择信息，在所述编码块模式中选择对应的编码块模式，并输出所选择的编码块模式。

公开(公告)号：US20110142130A1

公开(公告)日：2011-06-16

申请号：US12748365

申请日：2010-03-26

Applicant: Chia-Ping Lin ,  Chao-Tsung Huang ,  Ying-Hung Lu

Inventor： Chia-Ping Lin ,  Chao-Tsung Huang ,  Ying-Hung Lu

IPC: H04N7/26

CPC classification number: H04N19/573 ,  H04N19/172 ,  H04N19/174 ,  H04N19/42 ,  H04N19/44

Abstract: A picture decoder having a stream buffer, an H.264/AVC decoder, and a processor is provided. The stream buffer stores stream data. The H.264/AVC decoder decodes the stream data and performs an operation on a slice layer specified in the H.264/AVC standard to reorder reference pictures recorded in a reference picture list according to the stream data and generate a plurality of decoded pictures. The processor executes a program to perform an operation on a sequence layer specified in the H.264/AVC standard and mark the decoded pictures.

Abstract translation: 提供具有流缓冲器，H.264 / AVC解码器和处理器的图像解码器。 流缓冲器存储流数据。 H.264 / AVC解码器解码流数据并对H.264 / AVC标准中指定的片层执行操作，以根据流数据重新排列记录在参考图像列表中的参考图像，并生成多个解码图像 。 处理器执行程序以对H.264 / AVC标准中指定的序列层执行操作并标记解码的图像。