公开(公告)号：US20160284021A1

公开(公告)日：2016-09-29

申请号：US14671496

申请日：2015-03-27

Applicant: Andrew HERDRICH ,  Edwin VERPLANKE ,  Ravishankar IYER ,  Christopher GIANOS ,  Jeffrey D. CHAMBERLAIN ,  Ronak SINGH ,  Julius MANDELBLAT ,  Bret Toll

Inventor： Andrew HERDRICH ,  Edwin VERPLANKE ,  Ravishankar IYER ,  Christopher GIANOS ,  Jeffrey D. CHAMBERLAIN ,  Ronak SINGH ,  Julius MANDELBLAT ,  Bret Toll

IPC: G06Q40/02 ,  G06F12/08

CPC classification number: G06Q40/025 ,  G06F12/0875 ,  G06F12/0897 ,  G06F2212/1016 ,  G06F2212/502

Abstract: Systems, methods, and apparatuses for resource bandwidth monitoring and control are described. For example, in some embodiments, an apparatus comprising a requestor device to send a credit based request, a receiver device to receive and consume the credit based request, and a delay element in a return path between the requestor and receiver devices, the delay element to delay a credit based response from the receiver to the requestor are detailed.

Abstract translation: 描述了用于资源带宽监视和控制的系统，方法和装置。 例如，在一些实施例中，一种装置，包括发送基于信用的请求的请求者设备，接收和消费基于信用的请求的接收机设备，以及在请求者和接收机设备之间的返回路径中的延迟元件，延迟元件 将来自接收者的基于信用的响应延迟到请求者。

公开(公告)号：US07958284B2

公开(公告)日：2011-06-07

申请号：US11363650

申请日：2006-02-28

Applicant: Subramaniam Maiyuran ,  Christopher Gianos

Inventor： Subramaniam Maiyuran ,  Christopher Gianos

IPC: G06F3/00 ,  G06F5/00

CPC classification number: H04L7/02 ,  G06F5/065 ,  H04L7/005

Abstract: Methods and apparatus to transfer data between one or more clock domains are described. In one embodiment, a plurality of signals corresponding to write pointers of a buffer and a read pointer of the buffer are generated. The signals corresponding to the write pointers of the buffer are to be generated based on different data patterns for transmission over different channels. Other embodiments are also claimed and described.

Abstract translation: 描述了在一个或多个时钟域之间传送数据的方法和装置。 在一个实施例中，产生对应于缓冲器的写指针和缓冲器的读指针的多个信号。 将根据不同的数据模式生成与缓冲器的写指针对应的信号，以便在不同的通道上进行传输。 还要求保护和描述其它实施例。

公开(公告)号：US20070201592A1

公开(公告)日：2007-08-30

申请号：US11363650

申请日：2006-02-28

Applicant: Subramaniam Maiyuran ,  Christopher Gianos

Inventor： Subramaniam Maiyuran ,  Christopher Gianos

IPC: H04L7/00

CPC classification number: H04L7/02 ,  G06F5/065 ,  H04L7/005

Abstract: Methods and apparatus to transfer data between one or more clock domains are described. In one embodiment, a signal corresponding to a read pointer of a buffer is generated in response to a plurality of signals that correspond to write pointers of the buffer.

Abstract translation: 描述了在一个或多个时钟域之间传送数据的方法和装置。 在一个实施例中，响应于对应于缓冲器的写指针的多个信号而产生对应于缓冲器的读指针的信号。

公开(公告)号：US20070067514A1

公开(公告)日：2007-03-22

申请号：US11231273

申请日：2005-09-20

Applicant: Warren Anderson ,  Maurice Steinman ,  Richard Watson ,  Horst Wagner ,  Christopher Gianos ,  Suresh Balasubramanian ,  Tim Frodsham

Inventor： Warren Anderson ,  Maurice Steinman ,  Richard Watson ,  Horst Wagner ,  Christopher Gianos ,  Suresh Balasubramanian ,  Tim Frodsham

IPC: G06F13/38

CPC classification number: H04L7/00 ,  H04L7/0008 ,  H04L7/005

Abstract: In one embodiment, the present invention includes a method for receiving data from a second device in a first device, forwarding the data from an input/output (I/O) clock domain to a system clock domain of the first device, and providing the data to a functional unit of the first device at a deterministic time. In such manner, the two devices may operate in lockstep fashion. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，本发明包括一种用于从第一设备中的第二设备接收数据的方法，将数据从输入/输出（I / O）时钟域转发到第一设备的系统时钟域， 在确定性时间将数据传送到第一设备的功能单元。 以这种方式，两个装置可以锁定方式操作。 描述和要求保护其他实施例。