公开(公告)号：US06184123B2

公开(公告)日：2001-02-06

申请号：US09365982

申请日：1999-08-02

Applicant: Chun-Hu Ge ,  Liang Szuma ,  Chih-Ming Chen

Inventor： Chun-Hu Ge ,  Liang Szuma ,  Chih-Ming Chen

IPC: H01L214763

CPC classification number: H01L21/02321 ,  H01L21/02126 ,  H01L21/022 ,  H01L21/02282 ,  H01L21/3122 ,  H01L21/3144 ,  H01L21/316 ,  H01L21/76825 ,  H01L21/76829

Abstract: A method of forming an integrated circuit device using ion implantation to improve the adhesion of plasma nitride to spin-on-glass is achieved. Semiconductor device structures are provided in and on a substrate where conductive connections are planned between the device structures and planned conductive traces overlying a planned interlevel dielectric layer. An insulating oxide layer is deposited overlying the device structures. A spin-on-glass layer is coated overlying the insulating oxide layer. The spin-on-glass layer is dried. The spin-on-glass layer is ion implanted to form an amorphous, silicon rich, adhesion layer at the top surface of the spin-on-glass layer. The spin-on-glass layer is cured. A first plasma-enhanced silicon nitride layer deposited overlying the adhesion layer of the spin-on-glass and completing the interlevel dielectric layer. Via openings are etched through to the top surfaces of the semiconductor device. A conductive layer is deposited to fill the via openings and is etched to form the conductive traces. A second plasma-enhanced silicon nitride layer is deposited to complete the integrated circuit.

Abstract translation: 实现了使用离子注入形成集成电路器件以提高等离子体氮化物与旋涂玻璃的粘附性的方法。 半导体器件结构设置在衬底中和衬底上，其中在器件结构之间规划导电连接并且覆盖在计划的层间电介质层上的预定的导电迹线。 绝缘氧化物层沉积在器件结构上。 覆盖绝缘氧化物层的旋涂玻璃层。 将旋涂玻璃层干燥。 旋涂玻璃层被离子注入以在旋涂玻璃层的顶表面上形成无定形，富硅的粘附层。 旋涂玻璃层固化。 第一等离子体增强的氮化硅层沉积在覆膜上，并且完成了层间电介质层。 通孔开口蚀刻到半导体器件的顶表面。 沉积导电层以填充通孔开口并被蚀刻以形成导电迹线。 沉积第二等离子体增强氮化硅层以完成集成电路。

公开(公告)号：US06251799B1

公开(公告)日：2001-06-26

申请号：US09356004

申请日：1999-07-16

Applicant: Wei-Sheng Lai ,  Yu-Ching Chang ,  Chun-Hu Ge ,  Chih-Ming Chen

Inventor： Wei-Sheng Lai ,  Yu-Ching Chang ,  Chun-Hu Ge ,  Chih-Ming Chen

IPC: H01L2131

CPC classification number: H01L21/7682

Abstract: A method to provide low dielectric constant voids between adjacent conducting lines in a semiconductor device. Narrowly spaced metal lines are formed on the substrate surface. A dielectric layer is deposited overlying the metal lines and the substrate surface. A high water content, water saturated, environment is created for the spin-on-glass process. A pseudo-water condition exists on the surface of the dielectric layer prior to the deposition of the spin-on-glass layer. The spin-on-glass layer is deposited overlying the dielectric layer. Voids form in the spin-on-glass layer between the narrowly spaced metal lines. The spin-on-glass layer is baked. The integrated circuit device is completed.

Abstract translation: 一种在半导体器件中的相邻导线之间提供低介电常数空隙的方法。 在基板表面上形成窄间隔的金属线。 沉积在金属线和衬底表面上的电介质层。 为旋涂工艺创造出高含水量，水饱和的环境。 在蒸镀玻璃层的沉积之前，在水介质层的表面上存在假水条件。 旋涂玻璃层沉积在电介质层上。 在间隔狭窄的金属线之间的旋涂玻璃层中形成空隙。 旋涂玻璃层被烘烤。 集成电路装置完成。