公开(公告)号：US12125703B2

公开(公告)日：2024-10-22

申请号：US17697418

申请日：2022-03-17

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shibun Tsuda

IPC: H01L29/76 ,  H01L21/02 ,  H01L21/027 ,  H01L21/3105 ,  H01L21/762 ,  H01L29/94

CPC classification number: H01L21/0272 ,  H01L21/02126 ,  H01L21/31051 ,  H01L21/7624

Abstract: After a plurality of trenches is formed in an SOI substrate, a side surface of the insulating layer is retreated from a side surface of the semiconductor layer and a side surface of the semiconductor substrate. Next, the side surface of the insulating layer is covered with an organic film and also the side surface of the semiconductor layer is exposed from the organic film by performing an anisotropic etching process to the organic film embedded into an inside of each of the plurality of trenches. Next, each of the side surface of the semiconductor layer and the side surface of the semiconductor substrate is approached to the side surface of the insulating layer by performing an isotropic etching process. Further, after the organic film is removed, an oxidation treatment is performed to each of the side surface of the semiconductor layer and the side surface of the semiconductor substrate.

公开(公告)号：US20240347465A1

公开(公告)日：2024-10-17

申请号：US18753766

申请日：2024-06-25

Applicant: Intel Corporation

Inventor： Atul MADHAVAN ,  Nicholas J. KYBERT ,  Mohit K. HARAN ,  Hiten KOTHARI

IPC: H01L23/535 ,  H01L21/02 ,  H01L21/027 ,  H01L21/311 ,  H01L21/768 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/45 ,  H01L29/51

CPC classification number: H01L23/535 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/823437 ,  H01L21/823475 ,  H01L27/0886 ,  H01L29/518 ,  H01L21/02164 ,  H01L21/0228 ,  H01L21/0276 ,  H01L21/31144 ,  H01L29/45

Abstract: Contact over active gate (COAG) structures with etch stop layers, and methods of fabricating contact over active gate (COAG) structures using etch stop layers, are described. In an example, an integrated circuit structure includes a plurality of gate structures above substrate, each of the gate structures including a gate insulating layer thereon. A plurality of conductive trench contact structures is alternating with the plurality of gate structures, each of the conductive trench contact structures including a trench insulating layer thereon. A first dielectric etch stop layer is directly on and continuous over the trench insulating layers and the gate insulating layers. A second dielectric etch stop layer is directly on and continuous over the first dielectric etch stop layer, the second dielectric etch stop layer distinct from the first dielectric etch stop layer. An interlayer dielectric material is on the second dielectric etch stop layer.

公开(公告)号：US20240339359A1

公开(公告)日：2024-10-10

申请号：US18626758

申请日：2024-04-04

Applicant: ASM IP Holding B.V.

Inventor： René Henricus Jozef Vervuurt ,  Timothee Blanquart ,  Jihee Jeon ,  YongMin Yoo ,  Andrey Sokolov ,  Maarten Stokhof ,  Steven Van Aerde ,  Dieter Pierreux ,  Hussein Mehdi

IPC: H01L21/768 ,  H01L21/02

CPC classification number: H01L21/76879 ,  H01L21/02126 ,  H01L21/0217 ,  H01L21/02274

Abstract: The present disclosure relates to method and apparatuses for filling a gap on a substrate. The method comprises providing a substrate, which comprises at least one gap into a reaction chamber, depositing a silicon containing first layer onto the substrate; subjecting the first layer to a phosphorous containing compound to form a flowable intermediate material, which at least partially fills the at least one gap on the substrate; and forming a solid material comprising silicon.

公开(公告)号：US20240304438A1

公开(公告)日：2024-09-12

申请号：US18664146

申请日：2024-05-14

Applicant: VERSUM MATERIALS US, LLC

Inventor： HARIPIN CHANDRA ,  XINJIAN LEI ,  ANUPAMA MALLIKARJUNAN ,  MOO-SUNG KIM

IPC: H01L21/02 ,  C23C16/30 ,  C23C16/34 ,  C23C16/40 ,  C23C16/455 ,  C23C16/56

CPC classification number: H01L21/02208 ,  C23C16/308 ,  C23C16/345 ,  C23C16/402 ,  C23C16/45525 ,  C23C16/45553 ,  C23C16/56 ,  H01L21/02118 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/0228 ,  H01L21/02326 ,  H01L21/02337 ,  H01L21/0234

Abstract: A composition and method for using the composition in the fabrication of an electronic device are disclosed. Compounds, compositions and methods for depositing a low dielectric constant (

公开(公告)号：US20240263348A1

公开(公告)日：2024-08-08

申请号：US18106732

申请日：2023-02-07

Applicant: Robert Bosch GmbH

Inventor： Bo CHENG ,  Mordechai KORNBLUTH ,  Charles TUFFILE ,  Jens BARINGHAUS ,  Christian HUBER

IPC: C30B25/16 ,  C30B25/18 ,  C30B29/40 ,  H01L21/02 ,  H01L23/31

CPC classification number: C30B25/16 ,  C30B25/183 ,  C30B29/406 ,  H01L21/022 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L23/3171 ,  H01L23/3192 ,  H01L21/02126 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02175 ,  H01L23/291

Abstract: A method of manufacturing a structure for power electronics which includes epitaxially growing a GaN semiconductor layer is provided. The method includes growing buffer layers formed of AlN and AlxGa(1-x)N, wherein 0

公开(公告)号：US12049695B2

公开(公告)日：2024-07-30

申请号：US16134410

申请日：2018-09-18

Applicant: Versum Materials US, LLC

Inventor： Raymond Nicholas Vrtis ,  William Robert Entley ,  Robert Gordon Ridgeway ,  Xinjian Lei ,  John Francis Lehmann ,  Manchao Xiao

IPC: H01L21/02 ,  C23C16/34 ,  C23C16/36 ,  C23C16/40 ,  C23C16/48 ,  C23C16/50

CPC classification number: C23C16/401 ,  C23C16/345 ,  C23C16/36 ,  C23C16/48 ,  C23C16/50 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02219 ,  H01L21/02222 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02326 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/02348

Abstract: Compositions for forming a silicon-containing film such as without limitation a silicon oxide, silicon nitride, silicon oxynitride, a carbon-doped silicon nitride, or a carbon-doped silicon oxide film on at least a surface of a substrate having a surface feature. In one aspect, the composition comprises at least one compound is selected from the group consisting of a siloxane, a trisilylamine-based compound, and a cyclic trisilazane compound.

公开(公告)号：US20240204076A1

公开(公告)日：2024-06-20

申请号：US18461336

申请日：2023-09-05

Applicant: LG Display Co., Ltd.

Inventor： KyungChul Ok ,  Uyhyun Choi ,  SeungChan Choi ,  Min-Gu Kang ,  Jaeman Jang ,  DaeHwan Kim ,  Seoyeon Im

IPC: H01L29/49 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L29/4908 ,  H01L29/401 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L21/02126

Abstract: The thin film transistor, fabrication method thereof, and display apparatus comprising the same are provided. The thin film transistor comprises a base substrate, an oxide semiconductor layer on the base substrate, a channel protection layer in contact with the oxide semiconductor layer, and a gate electrode spaced apart from the oxide semiconductor layer and at least partially overlapped with the oxide semiconductor layer, and the channel protection layer includes carbon.

公开(公告)号：US12014930B2

公开(公告)日：2024-06-18

申请号：US16979257

申请日：2019-08-07

Applicant: Tokyo Electron Limited

Inventor： Mitsuhiro Iwano ,  Masanori Hosoya

IPC: H01L21/3065 ,  H01J37/32 ,  H01L21/02 ,  H01L21/311 ,  H01L21/67

CPC classification number: H01L21/3065 ,  H01J37/32449 ,  H01J37/3266 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/31116 ,  H01L21/67069

Abstract: In an etching method, plasma from a processing gas containing a fluorocarbon gas is formed within a chamber of a plasma processing apparatus, and a deposit containing fluorocarbon is formed on a substrate. The substrate includes a first region formed of a silicon containing material and a second region formed of a metal containing material. Subsequently, plasma from a rare gas is formed within the chamber, and rare gas ions are supplied to the substrate. As a result, the first region is etched by the fluorocarbon contained in the deposit. When the plasma from the rare gas is formed, a magnetic field distribution in which a horizontal component on an edge side of the substrate is higher than a horizontal component on a center of the substrate is formed by an electromagnet.

公开(公告)号：US20240178156A1

公开(公告)日：2024-05-30

申请号：US18059093

申请日：2022-11-28

Applicant: International Business Machines Corporation

Inventor： Juntao Li ,  Min Gyu Sung ,  Ruilong Xie ,  Julien Frougier ,  Chanro Park

IPC: H01L23/00 ,  H01L21/02 ,  H01L21/306 ,  H01L21/308 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

CPC classification number: H01L23/562 ,  H01L21/02126 ,  H01L21/30604 ,  H01L21/308 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775

Abstract: One or more systems, devices, and/or methods of fabrication provided herein relate to nanosheet transistors with support dielectric pillars. According to one embodiment, a transistor device can comprise an active transistor fin and a support dielectric pillar located adjacent to the active transistor fin, wherein the support dielectric pillar stabilizes the active transistor fin.

公开(公告)号：US20240112907A1

公开(公告)日：2024-04-04

申请号：US18467909

申请日：2023-09-15

Applicant: Kokusai Electric Corporation

Inventor： Shoma MIYATA ,  Kimihiko NAKATANI ,  Takayuki WASEDA ,  Yoshitomo HASHIMOTO ,  Yoshiro HIROSE

IPC: H01L21/02

CPC classification number: H01L21/02359 ,  H01L21/02126 ,  H01L21/02211 ,  H01L21/02274 ,  C23C16/45574

Abstract: There is provided a technique that includes: (a) forming an oxide layer containing a predetermined element on a first film formed on a substrate by supplying a precursor gas containing the predetermined element to the substrate such that hydroxyl group terminations are formed on a surface of the oxide layer and a density of the hydroxyl group terminations on the oxide layer is higher than a density of hydroxyl group terminations on a surface of the first film before (a); and (b) hydrophobizing the surface of the oxide layer by supplying a modifying gas containing a hydrocarbon group to the substrate.