公开(公告)号：US20120066542A1

公开(公告)日：2012-03-15

申请号：US12880474

申请日：2010-09-13

申请人： Yung-Chih Chen ,  Chun-Yao Wang

发明人： Yung-Chih Chen ,  Chun-Yao Wang

IPC分类号： G06F11/20

CPC分类号： G06F17/505 ,  G06F17/504

摘要： The present invention discloses a method for node addition and removal of a circuit. The steps of the method include: (a) providing a circuit with a plurality of nodes; (b) selecting a target node for computing mandatory assignments (MAs) of stuck-at 0 and stuck-at 1 fault tests on the target node, respectively, by a processing unit; (c) finding an added substitute node by utilizing the MAs of stuck-at 0 and stuck-at 1 fault tests of the target node by the processing unit; and (d) replacing the target node by using the added substitute node closest to primary inputs; and (e) the steps (b)˜(d) are repeated for removing the replaceable nodes and simplifying the circuit.

摘要翻译： 本发明公开了一种节点添加和去除电路的方法。 该方法的步骤包括：（a）提供具有多个节点的电路; （b）通过处理单元分别选择目标节点，用于计算分别在目标节点上进行的0分和1个故障测试的强制分配（MAs）; （c）通过处理单元利用目标节点的“0”和“1”故障测试的MAs来查找添加的替代节点; 和（d）通过使用最靠近主要输入的添加的替代节点来替换目标节点; 和（e）重复步骤（b）〜（d）以去除可更换节点并简化电路。

公开(公告)号：US07427876B1

公开(公告)日：2008-09-23

申请号：US11687983

申请日：2007-03-19

申请人： Chun Yao Wang ,  Min Lun Chuang

发明人： Chun Yao Wang ,  Min Lun Chuang

IPC分类号： H03K19/173

CPC分类号： H03K3/0372

摘要： A reversible sequential element comprises a first logic gate and a second logic gate. The first logic gate includes a first input terminal, a second input terminal, a third input terminal, a first output terminal coupled to the first input terminal, a second output terminal and a third output terminal. The second logic gate includes a first input line, a second input line, a first output line and a second output line. When the first input terminal is set to a first state, the second input terminal is coupled to the third output terminal and the third input terminal is coupled to the second output terminal; otherwise, the second input terminal is coupled to the second output terminal and the third input terminal is coupled to the third output terminal. The third output terminal, second input line and second output line are coupled to each other. The input signal carried on the first input line is set as 0 so that the second output line and the first output line have the same output.

摘要翻译： 可逆顺序元件包括第一逻辑门和第二逻辑门。 第一逻辑门包括第一输入端，第二输入端，第三输入端，耦合到第一输入端的第一输出端，​​第二输出端和第三输出端。 第二逻辑门包括第一输入线，第二输入线，第一输出线和第二输出线。 当第一输入端子被设置为第一状态时，第二输入端子耦合到第三输出端子，第三输入端子耦合到第二输出端子; 否则，第二输入端子耦合到第二输出端子，第三输入端子耦合到第三输出端子。 第三输出端子，第二输入线和第二输出线彼此耦合。 将第一输入线上承载的输入信号设置为0，使得第二输出线和第一输出线具有相同的输出。

公开(公告)号：US07418721B2

公开(公告)日：2008-08-26

申请号：US11277948

申请日：2006-03-30

申请人： Chin-Sung Liu ,  Chia-Hao Ou ,  Chun-Yao Wang

发明人： Chin-Sung Liu ,  Chia-Hao Ou ,  Chun-Yao Wang

IPC分类号： G11B17/04

CPC分类号： G11B17/0515

摘要： An aligning and clipping apparatus for slot-in CD/DVD players/ROM to load different size discs is provided, including a base, a tray, at least two moveable clipping elements, at least two ejection elements, and an auxiliary clipping element. Two clipping elements are installed at the front end of the tray for loading and clipping the disc. The auxiliary clipping element is on the top of the base for improving the stability of the clipping. The ejection elements are at the two sides of the rear end of the tray for ejecting the clipping of the disc so that the disc is in the position for data reading and writing. To achieve the function for clipping different size discs, the moveable clipping elements are placed at a specific angle and a specific curvature. Therefore, the different size discs can be clipped and held.

摘要翻译： 提供了一种用于插入CD / DVD播放器/ ROM以加载不同尺寸的盘的对准和裁剪装置，包括基座，托盘，至少两个可移动的剪辑元件，至少两个弹出元件和辅助裁切元件。 两个剪切元件安装在托盘的前端，用于装载和裁剪光盘。 辅助剪切元件位于底座的顶部，以提高剪辑的稳定性。 排出元件位于托盘的后端的两侧，用于弹出盘的夹持，使得盘处于用于数据读取和写入的位置。 为了实现用于限制不同尺寸的光盘的功能，可移动的剪辑元件被放置在特定的角度和特定的曲率。 因此，可以剪切和保持不同尺寸的光盘。

公开(公告)号：US06675337B1

公开(公告)日：2004-01-06

申请号：US09630905

申请日：2000-08-02

申请人： Shing-Wu Tung ,  Chun-Yao Wang ,  Jing-Yang Jou

发明人： Shing-Wu Tung ,  Chun-Yao Wang ,  Jing-Yang Jou

IPC分类号： G01R3128

CPC分类号： G01R31/318342

摘要： A built-in verification circuit having a circuit-under-test circuit, a test pattern generator, a bi-directional signal flow switch and three unidirectional, signal flow switches. The test pattern generator produces a testing pattern based on an input/output port order fault model. The bi-directional signal flow switch is positioned between the input terminal of the built-in verification circuit and the circuit-under-test circuit. The first unidirectional signal flow switch is positioned between the circuit-under-test circuit and the test pattern generator. The second unidirectional signal flow switch is positioned between the circuit-under-test circuit and the output terminal of the built-in verification circuit. The third unidirectional signal flow switch is positioned between the test pattern generator and the output terminal of the built-in verification circuit. The bi-directional signal flow switch and the first unidirectional signal flow switch are used for controlling the input terminal of the built-in verification circuit and the signal flow direction of the test pattern generator. The second and the third unidirectional signal flow switch are used for controlling the signal source of the output from the built-in verification circuit.

摘要翻译： 具有电路不足测试电路，测试图形发生器，双向信号流开关和三个单向信号流开关的内置验证电路。 测试模式生成器基于输入/输出端口顺序故障模型生成测试模式。 双向信号流开关位于内置验证电路的输入端和被测电路之间。 第一单向信号流开关位于测试电路和测试图案发生器之间。 第二单向信号流开关位于被测电路和内置验证电路的输出端之间。 第三单向信号流开关位于测试图形发生器和内置验证电路的输出端之间。 双向信号流开关和第一单向信号流开关用于控制内置验证电路的输入端和测试模式发生器的信号流向。 第二和第三单向信号流开关用于控制来自内置验证电路的输出的信号源。

公开(公告)号：US20120216155A1

公开(公告)日：2012-08-23

申请号：US13033582

申请日：2011-02-23

申请人： Ping-Chia Shih ,  Chun-Yao Wang ,  Chang-Yih Chen ,  Yau-Kae Sheu

发明人： Ping-Chia Shih ,  Chun-Yao Wang ,  Chang-Yih Chen ,  Yau-Kae Sheu

IPC分类号： G06F17/50

CPC分类号： G06F17/5081

摘要： A method for checking mask design of an integrated circuit, wherein the integrated circuit includes a plurality of functional elements arranged at different positions, the method includes generating implant layer data of each functional element of the integrated circuit according to characteristics of each functional element; generating mask design data of the integrated circuit according to circuit design of the integrated circuit; generating a block diagram of the integrated circuit according to the mask design data; determining a corresponding position of the functional element in the block diagram according to the implant layer data; and comparing the implant layer data of the functional element with the mask design data at the corresponding position.

摘要翻译： 一种用于检查集成电路的掩模设计的方法，其中所述集成电路包括布置在不同位置的多个功能元件，所述方法包括根据每个功能元件的特性产生所述集成电路的每个功能元件的注入层数据; 根据集成电路的电路设计生成集成电路的掩模设计数据; 根据掩模设计数据生成集成电路的框图; 根据植入层数据确定框图中的功能元件的对应位置; 以及将所述功能元件的植入层数据与相应位置处的掩模设计数据进行比较。

公开(公告)号：US07987476B2

公开(公告)日：2011-07-26

申请号：US12186519

申请日：2008-08-06

申请人： Chin-Sung Liu ,  Chia-Hao Ou ,  Chun-Yao Wang

发明人： Chin-Sung Liu ,  Chia-Hao Ou ,  Chun-Yao Wang

IPC分类号： G11B17/028

CPC分类号： G11B17/0515 ,  G11B17/0404

摘要： An apparatus for clamping both large and small disks is provided, including a disk tray inside a base, an upper case and two clamping mechanisms above the disk tray and the base. Each clamping mechanism includes a slider and a gripper structure. The gripper structure further includes a first gripper, a second gripper, and a resilient element located between the first and the second grippers. The second gripper includes a first belt-ring and a second belt-ring. When the disk is loaded, under the force of the resilient element, the first belt-ring and the second belt-ring hold the disk onto the disk tray firmly. When the first gripper moves to a specific position of the groove on the upper case, the first gripper causes the second gripper to rotate so that the resilient element stops to exert the force. Hence, the first belt-ring and the second belt-ring rotate upwards so as to complete the loading process. On the other hand, to eject a disk, the resilient element re-exerts force on the first gripper to cause the first belt-ring and the second belt-ring to rotate downwards to hold the disk until the disk is completely ejected to complete the ejecting process.

摘要翻译： 提供了一种用于夹紧大盘和小盘的装置，其中包括在盘底盘内的盘托盘，上壳体和盘托盘和基座上方的两个夹紧机构。 每个夹紧机构包括滑块和夹持器结构。 夹持器结构还包括第一夹持器，第二夹持器和位于第一和第二夹持器之间的弹性元件。 第二夹持器包括第一带环和第二带环。 当盘被装载时，在弹性元件的作用下，第一带环和第二带环牢固地将盘保持在盘托架上。 当第一夹持器移动到上壳体上的槽的特定位置时，第一夹持器使第二夹持器旋转，使得弹性元件停止施加力。 因此，第一带环和第二带环向上旋转以完成装载过程。 另一方面，为了弹出盘，弹性元件重新施加在第一夹持器上的力，以使第一带环和第二带环向下旋转以保持盘直到盘被完全弹出以完成 弹出过程。

公开(公告)号：US20090077576A1

公开(公告)日：2009-03-19

申请号：US12186519

申请日：2008-08-06

申请人： Chin-Sung Liu ,  Chia-Hao Ou ,  Chun-Yao Wang

发明人： Chin-Sung Liu ,  Chia-Hao Ou ,  Chun-Yao Wang

IPC分类号： G11B17/028

CPC分类号： G11B17/0515 ,  G11B17/0404

摘要： An apparatus for clamping both large and small disks is provided, including a disk tray inside a base, an upper case and two clamping mechanisms above the disk tray and the base. Each clamping mechanism includes a slider and a gripper structure. The gripper structure further includes a first gripper, a second gripper, and a resilient element located between the first and the second grippers. The second gripper includes a first belt-ring and a second belt-ring. When the disk is loaded, under the force of the resilient element, the first belt-ring and the second belt-ring hold the disk onto the disk tray firmly. When the first gripper moves to a specific position of the groove on the upper case, the first gripper causes the second gripper to rotate so that the resilient element stops to exert the force. Hence, the first belt-ring and the second belt-ring rotate upwards so as to complete the loading process. On the other hand, to reject a disk, the resilient element re-exerts force on the first gripper to cause the first belt-ring and the second belt-ring rotate downwards to hold the disk until the disk is completely rejected to complete the rejecting process.

摘要翻译： 提供了一种用于夹紧大盘和小盘的装置，其中包括在盘底盘内的盘托盘，上壳体和盘托盘和基座上方的两个夹紧机构。 每个夹紧机构包括滑块和夹持器结构。 夹持器结构还包括第一夹持器，第二夹持器和位于第一和第二夹持器之间的弹性元件。 第二夹持器包括第一带环和第二带环。 当盘被装载时，在弹性元件的作用下，第一带环和第二带环牢固地将盘保持在盘托架上。 当第一夹持器移动到上壳体上的槽的特定位置时，第一夹持器使第二夹持器旋转，使得弹性元件停止施加力。 因此，第一带环和第二带环向上旋转以完成装载过程。 另一方面，为了排除盘，弹性元件对第一夹具重新施加力，使第一带环和第二带环向下旋转以保持盘直到盘完全被拒绝以完成拒收 处理。

公开(公告)号：US07432738B1

公开(公告)日：2008-10-07

申请号：US11692394

申请日：2007-03-28

申请人： Chun Yao Wang ,  Min Lun Chuang

发明人： Chun Yao Wang ,  Min Lun Chuang

IPC分类号： H03K19/173

CPC分类号： H03K3/037

摘要： A reversible sequential apparatus comprises a first logic gate and a second logic gate. The first logic gate includes first, second and third input terminals and first, second and third output terminals. The second logic gate includes first and second input lines and first and second output lines. The first input terminal for carrying a clock signal is coupled to the first output terminal and the second input terminal for carrying an input signal is coupled to the second output terminal. When the first input terminal and the second input terminal are simultaneously set to a first state, the level of the third output terminal is inverse to the level of the third input terminal; otherwise, the level of the third output terminal is identical to the level of the third input terminal. The third output terminal, second input line and second output line are coupled to each other. The input signal carried on the first input line is set to a constant level so that the second output line and the first output line have the same outputs.

摘要翻译： 可逆顺序设备包括第一逻辑门和第二逻辑门。 第一逻辑门包括第一，第二和第三输入端以及第一，第二和第三输出端。 第二逻辑门包括第一和第二输入线以及第一和第二输出线。 用于承载时钟信号的第一输入端耦合到第一输出端，​​并且用于承载输入信号的第二输入端耦合到第二输出端。 当第一输入端子和第二输入端子同时被设置为第一状态时，第三输出端子的电平与第三输入端子的电平相反; 否则，第三输出端子的电平与第三输入端子的电平相同。 第三输出端子，第二输入线和第二输出线彼此耦合。 将第一输入线上承载的输入信号设定为恒定电平，使得第二输出线和第一输出线具有相同的输出。

公开(公告)号：US20080238480A1

公开(公告)日：2008-10-02

申请号：US11692394

申请日：2007-03-28

申请人： Chun Yao Wang ,  Min Lun Chuang

发明人： Chun Yao Wang ,  Min Lun Chuang

IPC分类号： H03K19/173

CPC分类号： H03K3/037

摘要： A reversible sequential apparatus comprises a first logic gate and a second logic gate. The first logic gate includes first, second and third input terminals and first, second and third output terminals. The second logic gate includes first and second input lines and first and second output lines. The first input terminal for carrying a clock signal is coupled to the first output terminal and the second input terminal for carrying an input signal is coupled to the second output terminal. When the first input terminal and the second input terminal are simultaneously set to a first state, the level of the third output terminal is inverse to the level of the third input terminal; otherwise, the level of the third output terminal is identical to the level of the third input terminal. The third output terminal, second input line and second output line are coupled to each other. The input signal carried on the first input line is set to a constant level so that the second output line and the first output line have the same outputs.

摘要翻译： 可逆顺序设备包括第一逻辑门和第二逻辑门。 第一逻辑门包括第一，第二和第三输入端以及第一，第二和第三输出端。 第二逻辑门包括第一和第二输入线以及第一和第二输出线。 用于承载时钟信号的第一输入端耦合到第一输出端，​​并且用于承载输入信号的第二输入端耦合到第二输出端。 当第一输入端子和第二输入端子同时被设置为第一状态时，第三输出端子的电平与第三输入端子的电平相反; 否则，第三输出端子的电平与第三输入端子的电平相同。 第三输出端子，第二输入线和第二输出线彼此耦合。 将第一输入线上承载的输入信号设定为恒定电平，使得第二输出线和第一输出线具有相同的输出。

公开(公告)号：US20080238479A1

公开(公告)日：2008-10-02

申请号：US11687983

申请日：2007-03-19

申请人： Chun Yao Wang ,  Min Lun Chuang

发明人： Chun Yao Wang ,  Min Lun Chuang

IPC分类号： H03K19/173

CPC分类号： H03K3/0372

摘要： A reversible sequential element comprises a first logic gate and a second logic gate. The first logic gate includes a first input terminal, a second input terminal, a third input terminal, a first output terminal coupled to the first input terminal, a second output terminal and a third output terminal. The second logic gate includes a first input line, a second input line, a first output line and a second output line. When the first input terminal is set to a first state, the second input terminal is coupled to the third output terminal and the third input terminal is coupled to the second output terminal; otherwise, the second input terminal is coupled to the second output terminal and the third input terminal is coupled to the third output terminal. The third output terminal, second input line and second output line are coupled to each other. The input signal carried on the first input line is set as 0 so that the second output line and the first output line have the same output.

摘要翻译： 可逆顺序元件包括第一逻辑门和第二逻辑门。 第一逻辑门包括第一输入端，第二输入端，第三输入端，耦合到第一输入端的第一输出端，​​第二输出端和第三输出端。 第二逻辑门包括第一输入线，第二输入线，第一输出线和第二输出线。 当第一输入端子被设置为第一状态时，第二输入端子耦合到第三输出端子，第三输入端子耦合到第二输出端子; 否则，第二输入端子耦合到第二输出端子，第三输入端子耦合到第三输出端子。 第三输出端子，第二输入线和第二输出线彼此耦合。 将第一输入线上承载的输入信号设置为0，使得第二输出线和第一输出线具有相同的输出。