Power-efficient biasing circuit
    2.
    发明授权
    Power-efficient biasing circuit 有权
    省电偏置电路

    公开(公告)号:US07852168B1

    公开(公告)日:2010-12-14

    申请号:US11840745

    申请日:2007-08-17

    CPC classification number: H03L7/099 H03L7/0802

    Abstract: Energy-efficient timing circuits are described. Such circuits may include a biasing circuit configured to provide a control bias current to a voltage-controlled oscillator (VCO). The biasing circuit may repetitively switch between a normal-power operating mode and a reduced-power operating mode. During the normal-power operating mode, the biasing circuit may generate a control voltage representative of a desired control bias current for the VCO. By then storing the control voltage using a device, such as a capacitor, much of the biasing circuit may be turned off during the reduced-power operating mode.

    Abstract translation: 描述节能定时电路。 这样的电路可以包括被配置为向压控振荡器(VCO)提供控制偏置电流的偏置电路。 偏置电路可以在正常功率操作模式和降低功率操作模式之间重复地切换。 在正常工作模式期间,偏置电路可以产生代表VCO所需的控制偏置电流的控制电压。 然后,通过诸如电容器之类的装置来存储控制电压,在降低功率的操作模式期间,偏置电路的大部分可能被关断。

    Phase locked loop
    3.
    发明授权
    Phase locked loop 有权
    锁相环

    公开(公告)号:US08791732B2

    公开(公告)日:2014-07-29

    申请号:US13291498

    申请日:2011-11-08

    Abstract: A phase locked loop is provided. The phase locked loop includes a detector, a controlled oscillator and a filtering unit coupled between the detector and the controlled oscillator. The detector generates a phase difference signal according to a reference frequency and an oscillation signal. The controlled oscillator generates the oscillation signal according to a filtered signal. The filtering unit filters the phase difference signal to generate the filtered signal, and the filtering unit has a high frequency filter of which a pole is greater than the reference frequency and less than a frequency of the oscillation signal.

    Abstract translation: 提供锁相环。 锁相环包括耦合在检测器和受控振荡器之间的检测器,受控振荡器和滤波单元。 检测器根据参考频率和振荡信号产生相位差信号。 受控振荡器根据滤波信号产生振荡信号。 滤波单元对相位差信号进行滤波以生成滤波信号,滤波单元具有高于基准频率的极点并且小于振荡信号的频率的高频滤波器。

    PHASE LOCKED LOOP
    4.
    发明申请
    PHASE LOCKED LOOP 有权
    相位锁定环

    公开(公告)号:US20120286834A1

    公开(公告)日:2012-11-15

    申请号:US13291498

    申请日:2011-11-08

    Abstract: A phase locked loop is provided. The phase locked loop includes a detector, a controlled oscillator and a filtering unit coupled between the detector and the controlled oscillator. The detector generates a phase difference signal according to a reference frequency and an oscillation signal. The controlled oscillator generates the oscillation signal according to a filtered signal. The filtering unit filters the phase difference signal to generate the filtered signal, and the filtering unit has a high frequency filter of which a pole is greater than the reference frequency and less than a frequency of the oscillation signal.

    Abstract translation: 提供锁相环。 锁相环包括耦合在检测器和受控振荡器之间的检测器,受控振荡器和滤波单元。 检测器根据参考频率和振荡信号产生相位差信号。 受控振荡器根据滤波信号产生振荡信号。 滤波单元对相位差信号进行滤波以生成滤波信号,滤波单元具有高于基准频率的极点并且小于振荡信号的频率的高频滤波器。

Patent Agency Ranking