摘要:
A semiconductor circuit is provided. The semiconductor circuit includes a metal layer, a conductive layer disposed under the metal layer and a semiconductor device disposed under the conductive layer. The metal layer forms an inductor device. The semiconductor device is coupled to the inductor device.
摘要:
A phase locked loop is provided. The phase locked loop includes a detector, a controlled oscillator and a filtering unit coupled between the detector and the controlled oscillator. The detector generates a phase difference signal according to a reference frequency and an oscillation signal. The controlled oscillator generates the oscillation signal according to a filtered signal. The filtering unit filters the phase difference signal to generate the filtered signal, and the filtering unit has a high frequency filter of which a pole is greater than the reference frequency and less than a frequency of the oscillation signal.
摘要:
A phase locked loop is provided. The phase locked loop includes a detector, a controlled oscillator and a filtering unit coupled between the detector and the controlled oscillator. The detector generates a phase difference signal according to a reference frequency and an oscillation signal. The controlled oscillator generates the oscillation signal according to a filtered signal. The filtering unit filters the phase difference signal to generate the filtered signal, and the filtering unit has a high frequency filter of which a pole is greater than the reference frequency and less than a frequency of the oscillation signal.
摘要:
An apparatus for duty cycle calibration includes an input calibration circuit, a delay chain, a first comparator, and a second comparator. The input calibration circuit calibrates an input clock signal according to a first control signal so as to generate an input calibration clock signal. The delay chain includes a plurality of delay units coupled in series, and delays the input calibration clock signal so as to generate a first delay clock signal and a second delay clock signal. At least two of the delay units each have an adjustable delay time which is controlled according to a second control signal. The first comparator compares the input calibration clock signal with the first delay clock signal so as to generate the first control signal. The second comparator compares the input calibration clock signal with the second delay clock signal so as to generate the second control signal.
摘要:
A method used for testing the communication performance of a plurality of wireless signal access devices, and the steps of the testing method of each wireless signal access device include: (a). booting up the wireless signal access device; (b). activating said the wireless signal access device to transmit or receive testing packets to test the communication performance of the wireless signal access device. The feature of the present invention lies in completing a step a of the next wireless signal access device before completing a step b of a first wireless signal access device, and starting the step b of the next wireless signal access device in an appropriate timing after completing the step b of the first wireless signal access device, thereby reaching the goal of reducing the test time.
摘要:
A controllable oscillating system for generating a differential oscillating signal is disclosed. The controllable oscillating system includes an oscillating circuit and a current adjusting device. The oscillating circuit includes a controllable resonator, a cross-coupling driving device, and a current source. The cross-coupling driving device is coupled to the controllable resonator and utilized for driving the controllable resonator to generate the differential oscillating signal. The current source is coupled to the cross-coupling driving device and utilized for providing a first current. The current adjusting device is coupled to the cross-coupling driving device and utilized for adjusting currents passing through the cross-coupling driving device.
摘要:
A temperature controlling protection system for a heater of the wet etching device has a temperature controlling protection circuit and a heating ON/OFF controller, in which the temperature controlling circuit has an OR gate, an AND gate and a NOT gate. When the temperature controlling protection circuit receives signals from the wet etching device, such as a level signal for a level sensor, an overheated signal for a temperature sensor, a ON/OFF signal for an acid discharging switch, a protection signal and a caution signal for the heater 28 and output signal for a constant temperature controller, it is determined whether the heater of the wet etching device is actuated to provide heat to the reaction gas in the wet etching device.
摘要:
An oscillating signal generator utilized in a phase-locked loop (PLL) includes: an oscillating circuit arranged to generate an oscillating signal according to at least a first control signal; and a control circuit, arranged to adjust the first control signal according to a temperature; and the first control signal is tuned between a first boundary and a second boundary, and when the temperature is closer to a first temperature boundary than a second temperature boundary, and the control circuit is arranged to make the first control signal to be closer to the first boundary than the second boundary such that the oscillating circuit outputs the oscillating signal of a predetermined frequency in a locked mode of the PLL.
摘要:
An oscillating signal generator utilized in a phase-locked loop (PLL) includes: an oscillating circuit arranged to generate an oscillating signal according to at least a first control signal; and a control circuit, arranged to adjust the first control signal according to a temperature; and the first control signal is tuned between a first boundary and a second boundary, and when the temperature is closer to a first temperature boundary than a second temperature boundary, and the control circuit is arranged to make the first control signal to be closer to the first boundary than the second boundary such that the oscillating circuit outputs the oscillating signal of a predetermined frequency in a locked mode of the PLL.
摘要:
A DC offset calibration device for calibrating a DC offset of an output signal of a gain stage, the DC offset calibration device includes: a digital-to-analog converter (DAC) electrically connected to the gain stage for generating an offset current according to the DC offset of the output signal of the gain stage; and a current-to-current converter electrically connected to the DAC and the gain stage for reducing the signal scale of the offset current to generate a compensation signal so as to reduce the DC offset at the output of the gain stage.