Magnetic disc head linear motor positioning system
    1.
    发明授权
    Magnetic disc head linear motor positioning system 失效
    磁盘直线电机定位系统

    公开(公告)号:US3839664A

    公开(公告)日:1974-10-01

    申请号:US22504772

    申请日:1972-02-10

    摘要: A high precision linear positioning system for the positioning of signal heads in magnetic disc data storage systems or the like employing an actuator having an axially movable magnet rod mechanically linked to the head and a pair of fixed electromagnet coils respectively disposed about the ends of the magnet rod. The coils are suitably energized by an electronic control circuit to impart motive force to the magnet rod. The actuator includes a phototransducer assembly adapted to produce binary coded electrical signals corresponding to the specific track address at which the head is instantly located. The electronic control circuit is adapted for two modes of operation. In the first mode, the electronic control circuit functions to continuously subtract the desired binary track address entered into the system from the instant binary track address produced by the phototransducer assembly, and to velocity servo the actuator in response thereto. In the second mode of operation, employed after the head has reached the desired track, suitable switching circuitry interconnects the electronic control circuit in a position servo mode, employing as input, signals from additional photosensors in the phototransducer assembly, disposed in quadrature, to precisely position and detent the head above the desired track.

    摘要翻译: 一种用于将信号头定位在磁盘数据存储系统等中的高精度线性定位系统,其使用具有机械地连接到磁头的可轴向移动的磁棒的致动器和分别围绕磁体的端部设置的一对固定电磁体线圈 竿。 线圈被电子控制电路适当地激励以向磁棒赋予动力。 致动器包括适于产生对应于头立即定位的特定轨道地址的二进制编码电信号的光电转换器组件。 电子控制电路适用于两种操作模式。 在第一模式中,电子控制电路用于从光电传感器组件产生的瞬时二进制磁道地址连续地减去输入到系统中的期望的二进制磁道地址,并响应于该速度伺服致动器。 在第二种操作模式下,在磁头达到所需的磁道之后采用合适的开关电路,以位置伺服模式将电子控制电路互连,采用正交设置的光电转换器组件中附加光电传感器的输入信号作为输入 将头部定位在所需轨道上方。

    Method and arrangement for sorting record units having keyfield bits arranged in descending order of significance without comparator
    4.
    发明授权
    Method and arrangement for sorting record units having keyfield bits arranged in descending order of significance without comparator 失效
    在不具备竞争力的情况下按照下列条件排列有关键字段的记录单元的方法和装置

    公开(公告)号:US3815083A

    公开(公告)日:1974-06-04

    申请号:US16217271

    申请日:1971-07-13

    发明人: DIRKS G SCHENCK P

    IPC分类号: G06F7/24 G06F7/06

    摘要: Record units, each addressable by a record unit address, have keyfields with keyfield bits arranged to be presented in descending order of significance. The record unit addresses are separated into first and second address groups, comprising all addresses corresponding, respectively, to record units having a most significant keyfield bit of 0 and 1. The first and second address groups are each similarly subdivided into two successive address sub-groups in dependence on the next most significant keyfield bit of each record unit. The separating process of each successive sub-groups of addresses is continued under control of equally weighted bits from each record unit until all keyfield bits have been utilized. A system of indicator numbers are assigned to each record unit address and are modified during each successive sub-grouping to reflect from which of the immediately preceding sub-groups the address is derived.

    摘要翻译: 记录单元,每个可由记录单元地址寻址,具有密钥字段,其中密钥字段位被布置成按重要性的降序呈现。 记录单元地址被分成第一和第二地址组,包括分别对应于具有最高有效密钥字段位0和1的记录单元的所有地址。第一和第二地址组各自类似地细分为两个连续的地址子块 依赖于每个记录单元的下一个最重要的键位。 每个连续的地址子组的分离过程在来自每个记录单元的相同加权比特的控制下继续,直到所有密钥字段位被使用为止。 指示符编号的系统被分配给每个记录单元地址,并且在每个连续的子分组期间被修改以反映从哪个前一个子组导出该地址。

    Cyclic data handling systems
    5.
    发明授权
    Cyclic data handling systems 失效
    循环数据处理系统

    公开(公告)号:US3711836A

    公开(公告)日:1973-01-16

    申请号:US3711836D

    申请日:1970-09-10

    发明人: DIRKS G

    IPC分类号: G06F7/36 G06F3/00

    CPC分类号: G06F7/36

    摘要: Information units are stored in a first sequence in a first cyclic storage unit and are transferred to a processing storage operating in synchronism with said first cyclic storage (i.e., at either the same or an integral multiple rate) under control of a control and processing unit. A key field associated with each information unit is fed to the control and processing unit which then controls transfer from the processing storage to second cyclic storage in such a manner that the information units are arranged in a predetermined sequence in accordance with the key fields of the units. The second cyclic storage unit operates at the same rate as the first cyclic storage unit. Merging may be accomplished by similar transfer from a first and second storage unit to a third and fourth cyclic storage unit.

    摘要翻译: 信息单元以第一序列存储在第一循环存储单元中,并且在控制和处理单元的控制下被传送到与所述第一循环存储器同步操作的处理存储器(即,以相同或整数倍速率) 。 与每个信息单元相关联的关键字段被馈送到控制和处理单元,控制和处理单元控制从处理存储器到第二循环存储器的传送,使得信息单元按照预定的顺序被排列成按照 单位。 第二循环存储单元以与第一循环存储单元相同的速率操作。 合并可以通过从第一和第二存储单元到第三和第四循环存储单元的类似转移来实现。

    Multiport data storage transfer system
    6.
    发明授权
    Multiport data storage transfer system 失效
    多重数据存储传输系统

    公开(公告)号:US3763473A

    公开(公告)日:1973-10-02

    申请号:US3763473D

    申请日:1971-07-06

    发明人: DIRKS G SCHENCK P

    IPC分类号: G06F13/12 G06F3/00 G06F13/04

    CPC分类号: G06F13/122

    摘要: A storage device to serve as a temporary or buffer storage includes a plurality of different memory locations, data entering and data sensing devices and associated equipment permitting the individual and independent addressing of each storage location. A first set of switching circuits interrelate certain data entering and data reading devices with the storage device and a further set of switching circuits interrelate other groups of data entering and reading devices to the storage device, all of which switching circuits are individually controllable such that the associated entering and reading devices can be individually and independently placed in an active state at different or the same times. Individual terminals or ports are also provided interconnecting the various switching circuits with peripheral equipment, e.g., CRT displays, magnetic tape, and data processing equipment.

    摘要翻译: 用作临时或缓冲存储器的存储设备包括多个不同的存储器位置,数据输入和数据感测设备以及允许每个存储位置的单独和独立寻址的相关设备。 第一组开关电路将某些数据输入和数据读取装置与存储装置相互关联,并且另一组开关电路将进入和读取装置的其它数据组相互关联到存储装置,所有开关电路都是可单独控制的, 相关的进入和读取设备可以在不同或相同的时间被单独和独立地置于活动状态。 还提供了将各种开关电路与诸如CRT显示器,磁带和数据处理设备的外围设备互连的各个端子或端口。

    Arrangement for performing arithmetic operation using a static and a dynamic storage
    7.
    发明授权
    Arrangement for performing arithmetic operation using a static and a dynamic storage 失效
    使用静态和动态存储进行算术运算的安排

    公开(公告)号:US3564229A

    公开(公告)日:1971-02-16

    申请号:US3564229D

    申请日:1969-01-23

    发明人: DIRKS GERHARD

    IPC分类号: G06F15/02 G06F7/50

    CPC分类号: G06F15/02

    摘要: A keyboard has keys arranged in denominations and digits within a denomination, each key connecting a digit and denomination selection line, thus storing a digit. A disc has groups of storage locations corresponding to denominations and dynamic storage positions in each group corresponding to the digits, the disc moving relative to reading and writing heads, associated respectively with input and output storage positions on the disc. Each digit selection line is connected to a writing head. A distributor applies signals from the reading heads in a predetermined sequence to the denomination lines in synchronism with the movement of the disc past the read and write head. Signals are thus transferred from the input storage positions on the disc to the output storage positions, the positioning in the output storage positions depending both upon the numbers stored in the input storage positions on the disc and the numbers stored in the keyboard, as well as an arithmetic operation connecting the two numbers.

    Method and system for sorting without comparator
    9.
    发明授权
    Method and system for sorting without comparator 失效
    无比较器分类的方法和系统

    公开(公告)号:US3714634A

    公开(公告)日:1973-01-30

    申请号:US3714634D

    申请日:1971-01-07

    发明人: DIRKS G SCHENCK P

    IPC分类号: G06F7/24 G06F7/06

    摘要: Record unit addresses, providing access to corresponding record units having keyfields, are stored in a first storage, each under control of the corresponding least significant keyfield bit. Zero keyfield bits cause storage of record unit addresses in sequential locations following a ''''0'''' assigned storage location; ''''1'''' keyfield bits cause storage of record unit addresses in sequential locations following a ''''1'''' assigned storage location. Record unit addresses in the ''''0'''' assigned storage locations of the first storage are then transferred to a second storage in the same manner under control of the next significant keyfield bit. Next, the record unit addresses in the ''''1'''' assigned storage locations of the first storage are so transferred to the second storage. The transfers are repeated under control of all keyfield bits, read-out from ''''0'''' assigned storage locations always preceding read-out from ''''1'''' assigned storage locations.