公开(公告)号：US5617432A

公开(公告)日：1997-04-01

申请号：US585002

申请日：1996-01-05

申请人： John S. Eggenberger ,  Paul Hodges ,  Norman K. Ouchi ,  David A. Plomgren

发明人： John S. Eggenberger ,  Paul Hodges ,  Norman K. Ouchi ,  David A. Plomgren

IPC分类号： G06F11/10 ,  H03M13/09 ,  G06F11/08

CPC分类号： H03M13/091 ,  G06F11/10

摘要： A data processing system and method providing error protection for data transmitted between a processor and a buffer in one data format and transmitted between the buffer and a user device in a different data format. An adaptor is interposed between the processor and the buffer for transmitting to the buffer (i) successive data segments in the one data format, each ending with appended check bytes in a preselected cyclic redundancy code (CRC); and (ii) check bytes using the same CRC appended at the end of each segment in the different data format to create in the buffer records which are a composite of both formats, but viewed as in the one data format by the processor and as in the different data format by the user device. The boundaries of the segments in each format must be known to the adaptor. Since both formats use the same CRC, CRC bytes for each segment in each data format will provide an identical preselected value in the absence of a detectable error. A second adaptor, which does not and need not know the boundaries of the data segments in the one data format, is interposed between the buffer and the user device for transmitting the data between the buffer and user device in the different data format.

摘要翻译： 一种数据处理系统和方法，用于以一种数据格式在处理器和缓冲器之间传输的数据提供错误保护，并以不同的数据格式在缓冲器和用户设备之间传输。 在处理器和缓冲器之间插入适配器，用于向缓冲器发送（i）一个数据格式的连续数据段，每个以预先选择的循环冗余码（CRC）中的附加校验字节结尾; 和（ii）使用不同数据格式在每个段末尾附加相同的CRC来校验字节，以在缓冲器记录中创建两个格式的复合，但是被处理器视为一种数据格式，并且如 用户设备的不同数据格式。 适配器必须知道每种格式的段的边界。 由于两种格式都使用相同的CRC，所以每种数据格式的每个段的CRC字节将在不存在可检测到的错误的情况下提供相同的预选值。 第二适配器不需要且不需要知道一种数据格式的数据段的边界，被插入缓冲器和用户设备之间，用于以不同的数据格式在缓冲器和用户设备之间传送数据。

公开(公告)号：US5603044A

公开(公告)日：1997-02-11

申请号：US385761

申请日：1995-02-08

申请人： Narasimhareddy L. Annapareddy ,  Damon W. Finney ,  Michael O. Jenkins ,  Larry B. Kessler ,  Donald J. Lang ,  Song C. Liang ,  David N. Mora ,  David A. Plomgren ,  Peter P. Urbisci ,  Andrew D. Walls

发明人： Narasimhareddy L. Annapareddy ,  Damon W. Finney ,  Michael O. Jenkins ,  Larry B. Kessler ,  Donald J. Lang ,  Song C. Liang ,  David N. Mora ,  David A. Plomgren ,  Peter P. Urbisci ,  Andrew D. Walls

IPC分类号： G06F15/173 ,  G06F1/18 ,  G06F13/40 ,  G06F9/02

CPC分类号： G06F13/409

摘要： An interconnection network comprises a pair of backplanes for receiving X pluggable node cards. The pair of backplanes include X backplane connector groups, each backplane connector group adapted to receive mating connectors from a pluggable node card. Each backplane connector group includes X/2 connectors. A first backplane includes first permanent wiring which interconnects a first subset of pairs of connectors between backplane connector groups. A second backplane includes second permanent wiring which interconnects a second subset of pairs of connectors between backplane connector groups. The first permanent wiring and second permanent wiring connect complementary subsets' of pairs of the connectors. A plurality of node cards, each including a card connector group, pluggably mate with the backplane connector groups. Each node card further includes a frontal connector that is adapted to receive a cable interconnection. Each node card includes a processor and a switch module which simultaneously connects the processor to at least plural connectors of a backplane connector group.

摘要翻译： 互连网络包括用于接收X个可插拔节点卡的一对背板。 该对背板包括X个背板连接器组，每个背板连接器组适于从可插拔节点卡接收配对连接器。 每个背板连接器组包括X / 2连接器。 第一背板包括将背板连接器组之间的第一对连接器对互连的第一永久布线。 第二背板包括第二永久布线，其将背板连接器组之间的第二对连接器对互连。 第一个永久布线和第二个永久布线连接了连接器对的互补子集。 多个节点卡，各自包括卡连接器组，可插拔地与背板连接器组配合。 每个节点卡还包括适于接收电缆互连的正面连接器。 每个节点卡包括处理器和开关模块，其将处理器同时连接到背板连接器组的至少多个连接器。

公开(公告)号：US07312402B2

公开(公告)日：2007-12-25

申请号：US10269404

申请日：2002-10-11

申请人： Rafael Antu ,  Cathy Marie Drews ,  David A. Plomgren ,  Todd Edward Takken

发明人： Rafael Antu ,  Cathy Marie Drews ,  David A. Plomgren ,  Todd Edward Takken

IPC分类号： H05K1/16 ,  H01K3/10

CPC分类号： H05K1/0231 ,  H05K1/114 ,  H05K2201/0792 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/49133 ,  Y10T29/49165

摘要： A method and apparatus that provides improved loop inductance of decoupling capacitors. Vias are moved close to the pads and close to each other. Instead of placing power and ground vias on opposite sides of the capacitor, these vias are moved around to the same side of the capacitor and are placed as close to each other as manufacturing tolerances will allow. For designs using standard two-terminal surface mount capacitors, two vias per capacitor, and standard manufacturing procedures (no vias inside pads, for example), the lowest possible loop inductance of the capacitor's connections to the printed circuit board planes is provided. This results in the lowest effective capacitor series input inductance.

摘要翻译： 提供去耦电容的环路电感的方法和装置。 通风口移动靠近垫子并彼此靠近。 代替在电容器的相对侧上放置电源和接地通孔，这些通孔被移动到电容器的同一侧，并且如制造公差将允许的那样放置得彼此靠近。 对于使用标准两端表面贴装电容器的设计，每个电容器有两个通孔，以及标准制造程序（例如，焊盘内部没有通孔），提供了电容器与印刷电路板平面连接的最低环路电感。 这导致最低有效的电容器串联输入电感。