公开(公告)号：US06734490B2

公开(公告)日：2004-05-11

申请号：US09919341

申请日：2001-07-30

Applicant: David Esseni ,  Luca Selmi ,  Roberto Bez ,  Alberto Modelli

Inventor： David Esseni ,  Luca Selmi ,  Roberto Bez ,  Alberto Modelli

IPC: H01L29788

CPC classification number: H01L29/66825 ,  G11C16/0416 ,  H01L27/11521 ,  H01L29/7885

Abstract: The memory cell is formed in a body of a P-type semiconductor material forming a channel region and housing N-type drain and source regions at two opposite sides of the channel region. A floating gate region extends above the channel region. A P-type charge injection region extends in the body contiguously to the drain region, at least in part between the channel region and the drain region. An N-type base region extends between the drain region, the charge injection region, and the channel region. The charge injection region and the drain region are biased by special contact regions so as to forward bias the PN junction formed by the charge injection region and the base region. The holes thus generated in the charge injection region are directly injected through the base region into the body, where they generate, by impact, electrons that are injected towards the floating gate region.

Abstract translation: 存储单元形成在形成沟道区域的P型半导体材料的主体中，并且在沟道区域的两个相对侧容纳N型漏极和源极区域。 浮动栅极区域在沟道区域的上方延伸。 P型电荷注入区域至少部分地在沟道区域和漏极区域之间在体内连续地延伸到漏极区域。 N型基极区域在漏极区域，电荷注入区域和沟道区域之间延伸。 电荷注入区域和漏极区域被特殊的接触区域偏置，以使由电荷注入区域和基极区域形成的PN结正向偏置。 这样在电荷注入区域中产生的孔直接通过基底区域注入到体内，在那里它们通过冲击产生被注入到浮动栅极区域的电子。

公开(公告)号：US06172908B2

公开(公告)日：2001-01-09

申请号：US09169239

申请日：1998-10-08

Applicant: Paolo Cappelletti ,  Bruno Ricco ,  David Esseni

Inventor： Paolo Cappelletti ,  Bruno Ricco ,  David Esseni

IPC: G11C1300

CPC classification number: G11C16/10 ,  G11C11/5621 ,  G11C11/5628 ,  G11C16/12

Abstract: In order to optimize writing of the cell, the latter is written in a condition of equilibrium between an injection current Ig and the displacement current CppVsl. In this way, during writing, the voltage of the floating gate region Vfl remains constant, as does the drain current and the rise in the threshold voltage. In particular, both for programming and for soft-writing after erasure, the substrate of the cell is biased at a negative voltage Vsb with respect to the source region, and the control gate region of the cell receives a ramp voltage Vcg with a selected predetermined inclination Vsl satisfying an equilibrium condition Vsl

Abstract translation: 为了优化电池的写入，后者被写入注入电流Ig和位移电流CppVsl之间的平衡状态。 以这种方式，在写入期间，浮栅区域Vfl的电压与漏极电流和阈值电压的上升一样保持恒定。 特别地，对于擦除后的编程和软写入，单元的基板相对于源极区域被偏置为负电压Vsb，单元的控制栅极区域接收具有所选预定的斜坡电压Vcg 倾斜度Vs1满足平衡条件Vs1