Emulating eviction data paths for invalidated instruction cache
    1.
    发明授权
    Emulating eviction data paths for invalidated instruction cache 有权
    仿真无效指令缓存的驱逐数据路径

    公开(公告)号:US09552293B1

    公开(公告)日:2017-01-24

    申请号:US13567206

    申请日:2012-08-06

    IPC分类号: G06F12/00 G06F12/08

    摘要: A method of managing processor caches. The method includes invalidating a cache line from a first instruction cache level and in response to invalidating the cache line from the first cache level, fetching data associated with the invalidated cache line from a third cache level or memory and writing the fetched data to a second cache level. The third cache level is larger or differently associative than the second cache level and the second cache level is larger or differently associative than the first cache level.

    摘要翻译: 管理处理器高速缓存的方法。 该方法包括从第一指令高速缓存级别使高速缓存行无效,并且响应于从第一高速缓存级别使高速缓存行无效,从第三高速缓存级别或存储器获取与无效高速缓存行相关联的数据,并将获取的数据写入第二高速缓存 缓存级别。 第三高速缓存级别比第二高速缓存级别更大或不同地相关联,并且第二高速缓存级别比第一高速缓存级别更大或不同地相关联。

    Process monitoring and diagnosis apparatus, systems, and methods
    2.
    发明申请
    Process monitoring and diagnosis apparatus, systems, and methods 审中-公开
    过程监控和诊断设备,系统和方法

    公开(公告)号:US20070079177A1

    公开(公告)日:2007-04-05

    申请号:US11241239

    申请日:2005-09-30

    IPC分类号: G06F11/00

    摘要: Apparatus, systems, methods, and articles may operate to create a performance breakpoint upon detecting a performance event using a breakpoint intercept module. These activities may occur in an environment used to diagnose a watched process. A diagnostic function may be performed upon an occurrence of the performance breakpoint. Other embodiments are described and claimed.

    摘要翻译: 使用断点拦截模块检测性能事件时,设备,系统,方法和文章可以操作以创建性能断点。 这些活动可能发生在用于诊断被监视进程的环境中。 可以在出现性能断点时执行诊断功能。 描述和要求保护其他实施例。