公开(公告)号：US07509552B2

公开(公告)日：2009-03-24

申请号：US11040140

申请日：2005-01-21

申请人： Wei-Yi Xiao ,  Dean G. Blair ,  Thomas Ruane ,  William Lewis

发明人： Wei-Yi Xiao ,  Dean G. Blair ,  Thomas Ruane ,  William Lewis

IPC分类号： G01R31/28 ,  G06F7/02

CPC分类号： G06F17/5022

摘要： A microprocessor simulation method, which is built upon the underlying hardware design of the microprocessor, stop normal functions of a simulation testcase, start the scan clocks, and record a first “snap shot” of the scan ring data at an initial time. The hardware logic then rotates (shifts) the scan ring using the current scan data, and when the scan clock stops (where the stop of the scan clock is controlled based on the number of latches on the scan ring), another “snap shot” of scan ring data is taken. The “snap shots” are compared and if both of the “snap shots” are identical the functional scan is successful. But if the functional scan verification fails to rotate the scan chain correctly, that is, if some of the latches do not match in the two “snap shots,” it becomes necessary to locate the broken spot within the large number of scan latches.

摘要翻译： 基于微处理器底层硬件设计的微处理器仿真方法，可以在初始时间停止模拟测试仪的正常功能，启动扫描时钟，并记录扫描环数据的第一个“快照”。 然后硬件逻辑使用当前的扫描数据旋转（移动）扫描环，并且当扫描时钟停止时（扫描时钟的停止基于扫描环上的锁存器的数量被控制），另一个“快照” 的扫描环数据。 比较“快照”，如果“快照”都相同，则功能扫描成功。 但是，如果功能扫描验证无法正确旋转扫描链，也就是说，如果两个“快照”中的一些闩锁不匹配，则有必要将断点定位在大量扫描锁存器内。