Abstract:
A method for classifying errors in the layout of a semiconductor circuit includes examining the layout of the semiconductor circuit for infringement of predetermined design rules in order to establish errors. For each error, the error is marked in the layout, and information about the error and the layout of the semiconductor circuit in an area surrounding the error is extracted. The extracted information is compared with prestored information within a multiplicity of classes, and the error is assigned to the respective class on the basis of the compared information.
Abstract:
A printing process for the transfer of printing substance (2) from an ink carrier (1) to an imprinting material (6), in which, with the help of an energy-emitting apparatus, which, during a process period, emits energy in the form of electromagnetic waves (3), and the printing substance (2) undergoes a change in volume and/or position, wherein, with the help of absorption bodies (4), energy is transferred from the electromagnetic waves (3) into the printing substance (2). The invention also includes an apparatus for practicing the process of the invention and a printing substance containing absorption bodies.
Abstract:
An accelerator module actuated by the driver's foot for controlling the output of a driving engine or motor of a motor vehicle employs a friction element for generating a friction hysteresis for the purpose of achieving a comfortable driving feel. Support of the pedal lever is completely independent of the generation of the friction hysteresis, resulting in a particularly favorable, especially stable, and play-free support of the pedal lever, and the brake insert for generating the friction hysteresis is particularly easy to manufacture.
Abstract:
For phosphating metal surfaces which consist at least in part of aluminum, by means of phosphating solutions which contain zinc, phosphate and fluoride, any titanium which has entered the phosphating solution and would disturb the formation of the layer is precipitated by an addition of SiO-containing compounds and after the precipitate has been removed, the content of free fluoride is readjusted to the required concentration. Particularly suitable compounds which contain SiO, consist of alkali metasilicate, alkali orthosilicate and/or alkali disilicate, preferably used in an amount of 0.05 to 1 g/l of the phosphating solution, or of silica, which is preferably used in an amount of 0.5 to 10 g per liter of the phosphating solution (calc. as Si).
Abstract:
A method for information retrieval in a communication network includes step 1) of transmitting a reference information from a mobile source device to a network instance. The reference information includes at least one of an image of a barcode from an accessible media and a related information that is derived from the barcode. The source device includes a Public Land Mobile Network interface and the reference information is transmitted via the Public Land Mobile Network interface. A second step 2) includes transmitting a target information, including information related to a selected target device, to the network instance, the target information being transmitted via the Public Land Mobile Network interface. A third step 3) includes transmitting a usable information from the network instance to the target device, the usable information being related to the reference information and including a media content that is used by the target device at a predetermined time. Step 1) is completed before step 2) begins the step 2) is completed before step 3) begins.
Abstract:
A method for optimizing the geometry of structural elements of a circuit pattern involves providing an overall circuit pattern of the circuit design and a plurality of basic patterns. Subsequently, the circuit pattern of the circuit design is iteratively decomposed into corresponding basic patterns in order to classify those parts of the circuit pattern of the plurality of structural elements wherein there exists a match with the basic pattern. Subsequently, further basic patterns are determined for those parts of the circuit pattern which were not previously classified. After applying a specification for optimizing the geometry of the structural elements, the optimized basic patterns are inserted into the circuit design thus achieving an improvement of the optical imaging properties.
Abstract:
A method for correcting layout errors of a layout, for example layout errors of a layout of an electronic circuit, is disclosed. In order to be able to correct such layout errors with the least possible complexity, the layout (10) is examined for the presence of layout errors (20, 30) with the aid of predetermined design rules, identical layout errors (20, 30) are combined in a respective error class, and all layout errors (30) of an error class that are still present are automatically corrected without further checking in an identical manner as soon as the correction of a layout error (20) of the respective error class that is used as an error representative has been performed.
Abstract:
Masks are produced for the fabrication of semiconductor structures based on layout data that has information for defining a mask layout with individual geometric structure elements. Layout data generated previously for a mask layout is checked to see whether geometric design requirements are satisfied. In the event of a violation of design requirements, the corresponding error locations in the mask layout are located. Further layout data are then generated, which contain information for defining correction figures to correct the respective error locations. The further layout data are linked with the layout data, so that the layout data are modified. This permits automated modification of the layout data and their technology-dependent optimization.
Abstract:
At least one cell pair graph is generated for cells of the layout. A partial inverse layout tree is determined from the cell pair graph. For the partial inverse layout tree, only branches of the complete inverse layout tree are considered that describe an interaction between shapes of different cells. A data set is generated from the partial inverse layout tree and the data set is saved, for example, by using the partial inverse layout tree.
Abstract:
A method for classifying errors in the layout of a semiconductor circuit includes examining the layout of the semiconductor circuit for infringement of predetermined design rules in order to establish errors. For each error, the error is marked in the layout, and information about the error and the layout of the semiconductor circuit in an area surrounding the error is extracted. The extracted information is compared with prestored information within a multiplicity of classes, and the error is assigned to the respective class on the basis of the compared information.