Semiconductor Memory Devices Including Diagonal Bit Lines
    1.
    发明申请
    Semiconductor Memory Devices Including Diagonal Bit Lines 有权
    包括对角位线的半导体存储器件

    公开(公告)号:US20090218610A1

    公开(公告)日:2009-09-03

    申请号:US12465234

    申请日:2009-05-13

    IPC分类号: H01L27/108

    摘要: A semiconductor memory device may include a semiconductor substrate having a plurality of active regions wherein each active region has a length in a direction of a first axis and a width in a direction of a second axis. The length may be greater than the width, and the plurality of active regions may be provided in a plurality of columns in the direction of the second axis. A plurality of wordline pairs may be provided on the substrate, with each wordline pair crossing active regions of a respective column of active regions defining a drain portion of each active region between wordlines of the respective wordline pair. A plurality of bitlines on the substrate may cross the plurality of wordline pairs, with each bitline being electrically coupled to a drain portion of a respective active region of each column, and with each bitline crossing drain portions of active regions of adjacent columns in different directions so that different portions of a same bitline are aligned in different directions on different active regions of adjacent columns.

    摘要翻译: 半导体存储器件可以包括具有多个有源区的半导体衬底,其中每个有源区具有在第一轴的方向上的长度和在第二轴的方向上的宽度。 长度可以大于宽度,并且多个有源区域可以在第二轴线的方向上以多个列设置。 可以在衬底上提供多个字线对,其中每个字线对跨越相应的有效区域列的有源区域,在相应字线对的字线之间限定每个有效区域的漏极部分。 衬底上的多个位线可以跨越多个字线对,每个位线电耦合到每列的相应有源区的漏极部分,并且每个位线在不同方向上与相邻列的有源区域的漏极部分交叉 使得相同位线的不同部分在相邻列的不同有效区域上在不同方向上对准。

    Semiconductor Memory Devices Including Extended Memory Elements
    2.
    发明申请
    Semiconductor Memory Devices Including Extended Memory Elements 审中-公开
    包括扩展内存元素的半导体存储器件

    公开(公告)号:US20090218654A1

    公开(公告)日:2009-09-03

    申请号:US12465261

    申请日:2009-05-13

    IPC分类号: H01L29/06 H01L29/68

    摘要: A semiconductor memory device may include a semiconductor substrate having an active region thereof, and the active region may have a length and a width, with the length being greater than the width. A field isolation layer may be on the semiconductor substrate surrounding the active region. First and second wordlines may be on the substrate crossing the active region, with the first and second wordlines defining a drain portion of the active region between the first and second wordlines and first and second source portions of the active region at opposite ends of the active region. First and second memory storage elements may be respectively coupled to the first and second source portions of the active region, with the first and second wordlines being between portions of the respective first and second memory storage elements and the active region in a direction perpendicular to a surface of the substrate.

    摘要翻译: 半导体存储器件可以包括具有其有源区的半导体衬底,并且有源区可以具有长度和宽度,其长度大于宽度。 场隔离层可以在围绕有源区的半导体衬底上。 第一和第二字线可以在与有源区交叉的衬底上,其中第一和第二字线限定在第一和第二字线之间的有源区的漏极部分和有源区的第一和第二源极部分在有源区域的相对端处 地区。 第一和第二存储器存储元件可以分别耦合到有源区域的第一和第二源极部分,其中第一和第二字线在相应的第一和第二存储器存储元件的部分之间,并且有源区域在垂直于 基板的表面。