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    Semiconductor memory devices including offset active regions
    1.
    发明授权
    Semiconductor memory devices including offset active regions 有权
    包括偏移活动区域的半导体存储器件

    公开(公告)号：US07547936B2

    公开(公告)日：2009-06-16

    申请号：US11246594

    申请日：2005-10-06

    申请人： Doo-Hoon Goo ,  Han-Ku Cho ,  Joo-Tae Moon ,  Sang-Gyun Woo ,  Gi-Sung Yeo ,  Kyoung-Yun Baek

    发明人： Doo-Hoon Goo ,  Han-Ku Cho ,  Joo-Tae Moon ,  Sang-Gyun Woo ,  Gi-Sung Yeo ,  Kyoung-Yun Baek

    IPC分类号： H01L271/108

    CPC分类号： H01L27/11502 ,  H01L27/0207 ,  H01L27/10814 ,  H01L27/10852 ,  H01L27/10855

    摘要： A semiconductor memory device may include a substrate having a plurality of active regions and a field isolation layer on the substrate surrounding the active regions of the substrate. Each of the plurality of active regions may have a length in a direction of a first axis and a width in a direction of a second axis, and the length may be greater than the width. The plurality of active regions may be provided in a plurality of columns of active regions in the direction of the second axis, and active regions of adjacent columns may be offset in the direction of the second axis.

    摘要翻译： 半导体存储器件可以包括具有多个有源区的衬底和围绕衬底的有源区的衬底上的场隔离层。 多个有源区域中的每一个可以具有在第一轴线的方向上的长度和在第二轴线的方向上的宽度，并且该长度可以大于宽度。 多个有源区域可以沿着第二轴线的方向设置在多个活性区域列中，并且相邻列的有效区域可以在第二轴线的方向上偏移。

    Methods for forming line patterns in semiconductor substrates
    2.
    发明授权
    Methods for forming line patterns in semiconductor substrates 失效
    在半导体衬底中形成线图案的方法

    公开(公告)号：US06803176B2

    公开(公告)日：2004-10-12

    申请号：US10227067

    申请日：2002-08-23

    申请人： Sang-jun Choi ,  Yool Kang ,  Joo-tae Moon ,  Jeong-hee Chung ,  Sang-gyun Woo

    发明人： Sang-jun Choi ,  Yool Kang ,  Joo-tae Moon ,  Jeong-hee Chung ,  Sang-gyun Woo

    IPC分类号： G03F740

    CPC分类号： G03F7/40

    摘要： A method for forming a fine pattern in a semiconductor substrate, by coating a target layer to be etched on a semiconductor substrate with a resist composition including at least one compound capable of forming a photoresist pattern by a photolithography process, and a free radical initiator. The free radical initiator is capable of being decomposed by a thermal process at a temperature equal to or higher than the glass transition temperature of the at least one compound. A lithography process is performed on the resist compound layer to form a photoresist pattern. The resist compound layer having the photoresist pattern formed therein is heated to a temperature equal to or higher than the glass transition temperature of the at least one compound, and wherein a partial cross-linking reaction in the resist composition occurs.

    摘要翻译： 一种在半导体衬底中形成精细图案的方法，其中通过用光刻工艺将包含至少一种能形成光致抗蚀剂图案的化合物的抗蚀剂组合物涂覆在半导体衬底上的待蚀刻靶材层和自由基引发剂。 自由基引发剂能够在等于或高于至少一种化合物的玻璃化转变温度的温度下被热处理分解。 在抗蚀剂化合物层上进行光刻工艺以形成光致抗蚀剂图案。 将其中形成有光致抗蚀剂图案的抗蚀剂化合物层加热到等于或高于至少一种化合物的玻璃化转变温度的温度，并且其中发生抗蚀剂组合物中的部分交联反应。

    Methods of etching platinum group metal film and forming lower electrode of capacitor
    3.
    发明授权
    Methods of etching platinum group metal film and forming lower electrode of capacitor 有权
    蚀刻铂族金属膜并形成电容器的下电极的方法

    公开(公告)号：US06169009A

    公开(公告)日：2001-01-02

    申请号：US09203337

    申请日：1998-12-02

    申请人： Byong-sun Ju ,  Hyoun-woo Kim ,  Chang-jin Kang ,  Joo-tae Moon ,  Byeong-yun Nam

    发明人： Byong-sun Ju ,  Hyoun-woo Kim ,  Chang-jin Kang ,  Joo-tae Moon ,  Byeong-yun Nam

    IPC分类号： H01L2120

    CPC分类号： C23F4/00 ,  H01L21/32136 ,  H01L28/60

    摘要： A method of etching a platinum group metal film uses a gas mixture containing argon (Ar), oxygen (O2) and halogen gases and a method of forming a lower electrode of a capacitor uses the etching method. The gas mixture contains O2, Ar, and a third component, preferably a halogen, e.g., chlorine (Cl2) or hydrogen bromide (HBr). In the method of forming a lower electrode, a conductive film containing a metal belonging to a platinum (Pt) group is formed on a semiconductor substrate, a hard mask partially exposing the conductive film is then formed on the conductive film. Then, the exposed conductive film is dry-etched using the hard mask as an etching mask and a three-component gas mixture containing argon (Ar) and oxygen (O2), to form a conductive film pattern beneath the hard mask, and the hard mask is then removed.

    摘要翻译： 蚀刻铂族金属膜的方法使用包含氩（Ar），氧（O 2）和卤素气体的气体混合物，并且形成电容器的下电极的方法使用蚀刻方法。 气体混合物含有O 2，Ar和第三组分，优选卤素，例如氯（Cl 2）或溴化氢（HBr）。 在形成下电极的方法中，在半导体衬底上形成含有属于铂（Pt）基团的金属的导电膜，然后在导电膜上形成部分地暴露导电膜的硬掩模。 然后，使用硬掩模作为蚀刻掩模和含有氩（Ar）和氧（O 2）的三组分气体混合物来干燥暴露的导电膜，以在硬掩模下形成导电膜图案，并且硬 然后取下面具。

    Semiconductor memory devices including offset bit lines
    5.
    发明授权
    Semiconductor memory devices including offset bit lines 有权
    包括偏移位线的半导体存储器件

    公开(公告)号：US08013374B2

    公开(公告)日：2011-09-06

    申请号：US12465202

    申请日：2009-05-13

    申请人： Doo-Hoon Goo ,  Han-Ku Cho ,  Joo-Tae Moon ,  Sang-Gyun Woo ,  Gi-Sung Yeo ,  Kyoung-Yun Baek

    发明人： Doo-Hoon Goo ,  Han-Ku Cho ,  Joo-Tae Moon ,  Sang-Gyun Woo ,  Gi-Sung Yeo ,  Kyoung-Yun Baek

    IPC分类号： H01L27/108

    CPC分类号： H01L27/10814 ,  H01L27/0207 ,  H01L27/10882 ,  H01L27/11502

    摘要： A semiconductor memory device may include a substrate having a plurality of active regions wherein each active region has a length in a direction of a first axis and a width in a direction of a second axis. The length may be greater than the width, and the plurality of active regions may be provided in a plurality of columns of active regions in the direction of the second axis. A plurality of wordline pairs may be provided on the substrate, with each wordline pair crossing active regions of a respective column of active regions defining a drain portion of each active region between wordlines of the respective wordline pair. A plurality of bitlines on the substrate may cross the plurality of wordline pairs, with each bitline being electrically coupled to a respective drain portion of an active region of each column, and with each bitline being arranged between the respective drain portion and another drain portion of an adjacent active region of the same column.

    摘要翻译： 半导体存储器件可以包括具有多个有源区的衬底，其中每个有源区具有在第一轴的方向上的长度和在第二轴的方向上的宽度。 长度可以大于宽度，并且多个有源区可以在第二轴的方向上设置在多个有效区列中。 可以在衬底上提供多个字线对，其中每个字线对跨越相应的有效区域列的有源区域，在相应字线对的字线之间限定每个有效区域的漏极部分。 衬底上的多个位线可以跨过多个字线对，每个位线电耦合到每个列的有源区的相应漏极部分，并且每个位线布置在相应的漏极部分和另一个漏极部分的另一个漏极部分之间 相同列的相邻有效区域。

    Resist compositions including thermal crosslinking agents
    6.
    发明申请
    Resist compositions including thermal crosslinking agents 审中-公开
    抗蚀剂组合物包括热交联剂

    公开(公告)号：US20050026078A1

    公开(公告)日：2005-02-03

    申请号：US10924484

    申请日：2004-08-24

    申请人： Sang-jun Choi ,  Yool Kang ,  Joo-tae Moon ,  Jeong-hee Chung ,  Sang-gyun Woo

    发明人： Sang-jun Choi ,  Yool Kang ,  Joo-tae Moon ,  Jeong-hee Chung ,  Sang-gyun Woo

    IPC分类号： G03F7/004 ,  C08K5/00 ,  C08K5/06 ,  C08K5/14 ,  C08K5/16 ,  C08K5/23 ,  C08L61/04 ,  G03F7/022 ,  G03F7/039 ,  G03F7/40 ,  H01L21/027 ,  G03C1/76

    CPC分类号： G03F7/40

    摘要： A method for forming a fine pattern in a semiconductor substrate, by coating a target layer to be etched on a semiconductor substrate with a resist composition including at least one compound capable of forming a photoresist pattern by a photolithography process, and a free radical initiator. The free radical initiator is capable of being decomposed by a thermal process at a temperature equal to or higher than the glass transition temperature of the at least one compound. A lithography process is performed on the resist compound layer to form a photoresist pattern. The resist compound layer having the photoresist pattern formed therein is heated to a temperature equal to or higher than the glass transition temperature of the at least one compound, and wherein a partial cross-linking reaction in the resist composition occurs.

    摘要翻译： 一种在半导体衬底中形成精细图案的方法，其中通过用光刻工艺将包含至少一种能形成光致抗蚀剂图案的化合物的抗蚀剂组合物涂覆在半导体衬底上的待蚀刻靶材层和自由基引发剂。 自由基引发剂能够在等于或高于至少一种化合物的玻璃化转变温度的温度下被热处理分解。 在抗蚀剂化合物层上进行光刻工艺以形成光致抗蚀剂图案。 将其中形成有光致抗蚀剂图案的抗蚀剂化合物层加热到等于或高于至少一种化合物的玻璃化转变温度的温度，并且其中发生抗蚀剂组合物中的部分交联反应。

    Methods for forming line patterns in semiconductor substrates
    7.
    发明授权
    Methods for forming line patterns in semiconductor substrates 失效
    在半导体衬底中形成线图案的方法

    公开(公告)号：US06485895B1

    公开(公告)日：2002-11-26

    申请号：US09533770

    申请日：2000-03-23

    申请人： Sang-jun Choi ,  Yool Kang ,  Joo-tae Moon ,  Jeong-hee Chung ,  Sang-gyun Woo

    发明人： Sang-jun Choi ,  Yool Kang ,  Joo-tae Moon ,  Jeong-hee Chung ,  Sang-gyun Woo

    IPC分类号： G03F740

    CPC分类号： G03F7/40

    摘要： A method for forming a fine pattern in a semiconductor substrate, comprises the steps of (a) coating a target layer to be etched on a semiconductor substrate with a resist composition comprising at least one compound capable of forming a photoresist pattern by a photolithography process, and a free radical initiator, wherein the free radical initiator is one which is capable of being decomposed by a thermal process at a temperature equal to or higher than the glass transition temperature of the at least one compound, wherein said coating step results in forming a resist compound layer comprising the resist composition; (b) performing a lithography process on the resist compound layer to form a photoresist pattern of at least one opening having a first width, wherein the target layer is exposed through the first width; and (c) heating the resist compound layer having the photoresist pattern formed therein to a temperature equal to or higher than the glass transition temperature of the at least one compound, and wherein a partial cross-linking reaction in the resist composition occurs by the free radicals produced from the free radical initiator resulting in a modified photoresist pattern having at least one opening having a second width which exposes the target layer, wherein the second width is smaller than the first width.

    摘要翻译： 一种用于在半导体衬底中形成精细图案的方法，包括以下步骤：（a）用包含至少一种能够通过光刻工艺形成光致抗蚀剂图案的化合物的抗蚀剂组合物在半导体衬底上涂覆待蚀刻的靶层， 和自由基引发剂，其中所述自由基引发剂是能够在等于或高于所述至少一种化合物的玻璃化转变温度的温度下通过热处理分解的引发剂，其中所述涂布步骤导致形成 抗蚀剂化合物层，其包含抗蚀剂组合物; （b）对抗蚀剂化合物层进行光刻处理以形成具有第一宽度的至少一个开口的光致抗蚀剂图案，其中目标层通过第一宽度暴露; 和（c）将其中形成有光致抗蚀剂图案的抗蚀剂化合物层加热到等于或高于至少一种化合物的玻璃化转变温度的温度，并且其中抗蚀剂组合物中的部分交联反应通过自由基 由自由基引发剂产生的自由基导致具有至少一个具有暴露目标层的第二宽度的开口的改性光致抗蚀剂图案，其中第二宽度小于第一宽度。

    Semiconductor Memory Devices Including Extended Memory Elements
    8.
    发明申请
    Semiconductor Memory Devices Including Extended Memory Elements 审中-公开
    包括扩展内存元素的半导体存储器件

    公开(公告)号：US20090218654A1

    公开(公告)日：2009-09-03

    申请号：US12465261

    申请日：2009-05-13

    申请人： Don-Hoon Goo ,  Han-Ku Cho ,  Joo-Tae Moon ,  Sang-Gyun Woo ,  Gi-Sung Yeo ,  Kyoung-Yun Baek

    发明人： Don-Hoon Goo ,  Han-Ku Cho ,  Joo-Tae Moon ,  Sang-Gyun Woo ,  Gi-Sung Yeo ,  Kyoung-Yun Baek

    IPC分类号： H01L29/06 ,  H01L29/68

    CPC分类号： H01L27/10814 ,  H01L27/0207 ,  H01L27/10882 ,  H01L27/11502

    摘要： A semiconductor memory device may include a semiconductor substrate having an active region thereof, and the active region may have a length and a width, with the length being greater than the width. A field isolation layer may be on the semiconductor substrate surrounding the active region. First and second wordlines may be on the substrate crossing the active region, with the first and second wordlines defining a drain portion of the active region between the first and second wordlines and first and second source portions of the active region at opposite ends of the active region. First and second memory storage elements may be respectively coupled to the first and second source portions of the active region, with the first and second wordlines being between portions of the respective first and second memory storage elements and the active region in a direction perpendicular to a surface of the substrate.

    摘要翻译： 半导体存储器件可以包括具有其有源区的半导体衬底，并且有源区可以具有长度和宽度，其长度大于宽度。 场隔离层可以在围绕有源区的半导体衬底上。 第一和第二字线可以在与有源区交叉的衬底上，其中第一和第二字线限定在第一和第二字线之间的有源区的漏极部分和有源区的第一和第二源极部分在有源区域的相对端处 地区。 第一和第二存储器存储元件可以分别耦合到有源区域的第一和第二源极部分，其中第一和第二字线在相应的第一和第二存储器存储元件的部分之间，并且有源区域在垂直于 基板的表面。