公开(公告)号：US20080059121A1

公开(公告)日：2008-03-06

申请号：US11468353

申请日：2006-08-30

申请人： Jane H. Bartik ,  Michael Billeci ,  Lisa C. Heller ,  Donald G. O'Brien ,  Bruce Wagar ,  Patrick M. West

发明人： Jane H. Bartik ,  Michael Billeci ,  Lisa C. Heller ,  Donald G. O'Brien ,  Bruce Wagar ,  Patrick M. West

IPC分类号： G06F11/30

CPC分类号： G06F11/3409 ,  G06F11/3476 ,  G06F2201/815 ,  G06F2201/835 ,  G06F2201/86 ,  G06F2201/885

摘要： Disclosed are a method and system for measuring the performance of individual logical partitions of a logically partitioned computer system. Preferably, the method and system both hardware and firmware to allow measurement samples to be collected only for user specified zones of interest. In one embodiment, the method comprises the steps of specifying a Zone or Zones of interest (a Zone being a logical partition), collecting measurement samples only from the one or more specified Zones of interest, and measuring the performance of each of these Zones using only the measurement samples collected from said each of the Zones.

摘要翻译： 公开了一种用于测量逻辑分区计算机系统的各个逻辑分区的性能的方法和系统。 优选地，所述方法和系统既包括硬件和固件，以允许仅针对用户指定的感兴趣区域收集测量样本。 在一个实施例中，该方法包括以下步骤：指定感兴趣的区域或区域（作为逻辑分区的区域），仅从所述一个或多个指定的感兴趣区域收集测量样本，并且使用 仅从所述各个区域收集的测量样本。

公开(公告)号：US20120246439A1

公开(公告)日：2012-09-27

申请号：US13490521

申请日：2012-06-07

申请人： Jane H. Bartik ,  Michael Billeci ,  Lisa C. Heller ,  Donald G. O'Brien ,  Bruce A. Wagar ,  Patrick M. West, JR.

发明人： Jane H. Bartik ,  Michael Billeci ,  Lisa C. Heller ,  Donald G. O'Brien ,  Bruce A. Wagar ,  Patrick M. West, JR.

IPC分类号： G06F12/06

CPC分类号： G06F11/3409 ,  G06F11/3476 ,  G06F2201/815 ,  G06F2201/835 ,  G06F2201/86 ,  G06F2201/885

摘要： Disclosed are a method and system for measuring the performance of individual logical partitions of a logically partitioned computer system. Preferably, the method and system both hardware and firmware to allow measurement samples to be collected only for user specified zones of interest. In one embodiment, the method comprises the steps of specifying a Zone or Zones of interest (a Zone being a logical partition), collecting measurement samples only from the one or more specified Zones of interest, and measuring the performance of each of these Zones using only the measurement samples collected from said each of the Zones.

摘要翻译： 公开了一种用于测量逻辑分区计算机系统的各个逻辑分区的性能的方法和系统。 优选地，所述方法和系统既包括硬件和固件，以允许仅针对用户指定的感兴趣区域收集测量样本。 在一个实施例中，该方法包括以下步骤：指定感兴趣的区域或区域（作为逻辑分区的区域），仅从所述一个或多个指定的感兴趣区域收集测量样本，并且使用 仅从所述各个区域收集的测量样本。

公开(公告)号：US5267242A

公开(公告)日：1993-11-30

申请号：US755209

申请日：1991-09-05

申请人： Russell W. Lavallee ,  Donald G. O'Brien ,  Michael Rubino ,  William W. Shen ,  George C. Wellwood

发明人： Russell W. Lavallee ,  Donald G. O'Brien ,  Michael Rubino ,  William W. Shen ,  George C. Wellwood

IPC分类号： G06F12/16 ,  G06F11/00 ,  G06F11/10 ,  G11C29/00

CPC分类号： G11C29/70 ,  G06F11/0724 ,  G06F11/076 ,  G06F11/1024 ,  G06F11/106 ,  G06F2201/88

摘要： A computer memory maintainence apparatus tests operating system storage and identifies a malfunctioning memory chip in an on-line memory array by detecting and recording all permanent data errors using data comparison along with data complementation and substitutes a spare memory chip for the malfunctioning one for all memory read commands. All write commands are performed on both spare memory and the malfunctioning memory chip. All contents of defective chip are copied to the spare chip. The computer system maintains the scrubbing and a recording counter for each of the data bits in an ECC memory data word. The sparing logic in the memory storage system maintains the bit steering logic and controls for the spare chip. When a counter is incremented above a threshold sparing is invoked to replace the failing bit position. The system writes to the defective and spare chips in parallel even after bit steering is invoked.

公开(公告)号：US09323640B2

公开(公告)日：2016-04-26

申请号：US13490521

申请日：2012-06-07

申请人： Jane H. Bartik ,  Michael Billeci ,  Lisa C. Heller ,  Donald G. O'Brien ,  Bruce A. Wagar ,  Patrick M. West, Jr.

发明人： Jane H. Bartik ,  Michael Billeci ,  Lisa C. Heller ,  Donald G. O'Brien ,  Bruce A. Wagar ,  Patrick M. West, Jr.

IPC分类号： G06F9/44 ,  G06F9/46 ,  G06F9/455 ,  G06F11/34

CPC分类号： G06F11/3409 ,  G06F11/3476 ,  G06F2201/815 ,  G06F2201/835 ,  G06F2201/86 ,  G06F2201/885

摘要： Disclosed are a method and system for measuring the performance of individual logical partitions of a logically partitioned computer system. Preferably, the method and system both hardware and firmware to allow measurement samples to be collected only for user specified zones of interest. In one embodiment, the method comprises the steps of specifying a Zone or Zones of interest (a Zone being a logical partition), collecting measurement samples only from the one or more specified Zones of interest, and measuring the performance of each of these Zones using only the measurement samples collected from said each of the Zones.

摘要翻译： 公开了一种用于测量逻辑分区计算机系统的各个逻辑分区的性能的方法和系统。 优选地，所述方法和系统既包括硬件和固件，以允许仅针对用户指定的感兴趣区域收集测量样本。 在一个实施例中，该方法包括以下步骤：指定感兴趣的区域或区域（作为逻辑分区的区域），仅从所述一个或多个指定的感兴趣区域收集测量样本，并且使用 仅从所述各个区域收集的测量样本。

公开(公告)号：US08209668B2

公开(公告)日：2012-06-26

申请号：US11468353

申请日：2006-08-30

申请人： Jane H. Bartik ,  Michael Billeci ,  Lisa C. Heller ,  Donald G O'Brien ,  Bruce Wagar ,  Patrick M. West, Jr.

发明人： Jane H. Bartik ,  Michael Billeci ,  Lisa C. Heller ,  Donald G O'Brien ,  Bruce Wagar ,  Patrick M. West, Jr.

IPC分类号： G06F9/44 ,  G06F9/46 ,  G06F9/455

CPC分类号： G06F11/3409 ,  G06F11/3476 ,  G06F2201/815 ,  G06F2201/835 ,  G06F2201/86 ,  G06F2201/885

摘要： Disclosed are a method and system for measuring the performance of individual logical partitions of a logically partitioned computer system. Preferably, the method and system both hardware and firmware to allow measurement samples to be collected only for user specified zones of interest. In one embodiment, the method comprises the steps of specifying a Zone or Zones of interest (a Zone being a logical partition), collecting measurement samples only from the one or more specified Zones of interest, and measuring the performance of each of these Zones using only the measurement samples collected from said each of the Zones.

摘要翻译： 公开了一种用于测量逻辑分区计算机系统的各个逻辑分区的性能的方法和系统。 优选地，所述方法和系统既包括硬件和固件，以允许仅针对用户指定的感兴趣区域收集测量样本。 在一个实施例中，该方法包括以下步骤：指定感兴趣的区域或区域（作为逻辑分区的区域），仅从所述一个或多个指定的感兴趣区域收集测量样本，并且使用 仅从所述各个区域收集的测量样本。

公开(公告)号：US4896939A

公开(公告)日：1990-01-30

申请号：US115258

申请日：1987-10-30

申请人： Donald G. O'Brien

发明人： Donald G. O'Brien

IPC分类号： G02B6/38 ,  G02B6/44 ,  H01B11/18 ,  H02G15/14

CPC分类号： H02G15/14 ,  G02B6/3816 ,  G02B6/3817 ,  G02B6/3847 ,  G02B6/3869 ,  G02B6/3887 ,  G02B6/3894 ,  G02B6/4416 ,  G02B6/4448 ,  H01B11/1891

摘要： Communication cable includes an optical fiber, a first tubular electrical conductor enclosing the optical fiber, a second tubular electrical conductor enclosing the first electrical conductor, and a dielectric support element disposed between the conductors for maintaining the conductors in a coaxial relationship, with a selected uniform electrical impedance therebetween. Connectors for coupling such cable include plug and receptacle modules for connecting respective electrical and optical elements in the cable.

摘要翻译： 通信电缆包括光纤，封闭光纤的第一管状电导体，封闭第一电导体的第二管状电导体和设置在导体之间的电介质支撑元件，用于将导体保持为同轴的关系， 它们之间的电阻抗。 用于联接这种电缆的连接器包括用于连接电缆中的相应电气和光学元件的插头和插座模块。

公开(公告)号：US4003620A

公开(公告)日：1977-01-18

申请号：US79781

申请日：1970-10-12

申请人： Donald G. O'Brien ,  Edward R. Walker

发明人： Donald G. O'Brien ,  Edward R. Walker

IPC分类号： H01R13/523 ,  H01R13/52

CPC分类号： H01R13/523 ,  Y10S439/935

摘要： Marine electrical cable apparatus has a flexible cable jacket loosely containing cable conductors and filled with a relatively incompressible fluid such as oil. The jacket flexes with changes in the environmental pressure to transmit that pressure to the inner fluid and thereby maintain minimal pressure differential across the jacket walls. Terminations at each end of the cable seal the jacket interior from the environment and feed the cable conductors from within the jacket out for connection with further electrical equipment.

摘要翻译： 海洋电缆设备具有柔软的电缆护套，其松弛地包含电缆导体并且填充有相对不可压缩的流体，例如油。 护套随着环境压力的变化而弯曲，以将该压力传递到内部流体，从而在护套壁上保持最小的压差。 电缆每端的端子将护套内部与环境密封，并将电缆导体从套管内部供电，以便与其他电气设备连接。