Method and an apparatus to modify CRC in intermediate high speed network
nodes
    1.
    发明授权
    Method and an apparatus to modify CRC in intermediate high speed network nodes 失效
    中间高速网络节点修改CRC的方法和装置

    公开(公告)号:US5689518A

    公开(公告)日:1997-11-18

    申请号:US431918

    申请日:1995-04-28

    摘要: A method and an apparatus to calculate in an intermediate node of a communication network, the new Frame Check Sequence (FCS) appended to a data bits message which has been modified in said intermediate network node. The invention is useful for high speed networks where the transit delay needs to be optimized in the network along with the computing resources in the intermediate network nodes in terms of computer cycles and memory size. The invention consists in calculating the difference between the FCS using the difference between the modified fields in the message and the distance in bits between the end of the modified field and the end of the message; the calculation consists in differentiating `short messages` in the data flow and to provide an optimized processing for the short messages, the processing for larger messages being based on this first optimized processing. The calculation of the modified FCS comprises operations on polynomials whose coefficients belong to the Galois's Field and whose degree is limited to the one of the polynomial generator of the corresponding CRC code. The calculations include also look up operations in tables limited in size. The choice between the possible implementations (full software, full hardware and mixed hardware and software with the usage of a Remult operator for the last two) will depend on the kind of the network (Frame Relay or other network) and the capacity of the intermediate network node.

    摘要翻译: 一种在通信网络的中间节点中计算的方法和装置,附加到已经在所述中间网络节点中被修改的数据比特消息的新的帧校验序列(FCS)。 本发明对于在计算机周期和存储器大小方面需要在网络中优化传输延迟以及中间网络节点中的计算资源的高速网络是有用的。 本发明在于使用消息中的修改字段与修改字段的结尾与消息结束之间的比特距离来计算FCS之间的差异; 该计算包括区分数据流中的“短消息”,并为短消息提供优化的处理,基于该第一优化处理的较大消息的处理。 修改的FCS的计算包括对其系数属于伽罗瓦域的多项式的操作,并且其程度被限制为相应CRC码的多项式生成器中的一个。 计算还包括在大小限制的表中查找操作。 可能的实现(完整的软件,完整的硬件以及混合的硬件和软件以及最后两个使用Remult运算符)之间的选择将取决于网络的类型(帧中继或其他网络)和中间件的容量 网络节点。

    Programmable high performance data communication adapter for high speed
packet transmission networks
    3.
    发明授权
    Programmable high performance data communication adapter for high speed packet transmission networks 失效
    可编程高性能数据通信适配器,用于高速分组传输网络

    公开(公告)号:US5528587A

    公开(公告)日:1996-06-18

    申请号:US252299

    申请日:1994-06-01

    IPC分类号: H04L29/06 H04J3/02 H04L12/56

    CPC分类号: H04L29/06

    摘要: A high performance data packet buffering method and a programmable data communication adapter for high speed packet transmission networks are disclosed. The line adapter includes programmable processing means, for receiving and transmitting data packets of fixed or variable length. This system is characterized in that it comprisesmeans for buffering (132) said data packets,means for identifying said buffering means and said data packets in said buffering means,means for queueing (FIG. 15) in storing means (131) said identifying means in a single instruction,means for dequeueing (FIG. 16) from said storing (131) means said identifying means in another single instruction,means for releasing said buffering means,Each instruction comprises up to three operations executed in parallel by said processing means:an arithmetical and logical (ALU) operation on said identifying means,memory operation on said storing means, anda sequence operation.

    摘要翻译: 公开了一种用于高速分组传输网络的高性能数据分组缓冲方法和可编程数据通信适配器。 线路适配器包括可编程处理装置,用于接收和发送具有固定或可变长度的数据分组。 该系统的特征在于它包括用于缓冲(132)所述数据分组的装置,用于识别所述缓冲装置中的所述缓冲装置和所述数据分组的装置,用于在存储装置(131)中排队(图15)的装置,所述识别装置 在单个指令中,用于从所述存储器(131)取出的装置(图16)意味着在另一单个指令中的所述识别装置,用于释放所述缓冲装置的装置。每个指令包括由所述处理装置并行执行的多达三个操作: 对所述识别装置进行算术和逻辑(ALU)操作,对所述存储装置进行存储操作和顺序操作。

    Adaptive clock recovery in asynchronous transfer mode networks
    4.
    发明授权
    Adaptive clock recovery in asynchronous transfer mode networks 有权
    异步传输模式网络中的自适应时钟恢复

    公开(公告)号:US06400683B1

    公开(公告)日:2002-06-04

    申请号:US09301820

    申请日:1999-04-29

    IPC分类号: H04L1256

    摘要: In a data communication network, a system clock rate can be inferred at a receiver by measuring the data rate during successive periods. This information is used to adjust or adapt a receiver output clock to the inferred system clock. To adapt a receiver buffer output clock frequency to the buffer input clock frequency, the level of the buffer is periodically monitored. If the fill level is greater than an upper threshold, the output clock frequency is incremented. If the fill level is less than a lower threshold, the output clock frequency is decremented. A count is maintained of the number of successive adjustment operations performed while the fill level is outside the range bounded by the thresholds. When the fill level returns to the bounded range, a number of reverse frequency adjustments are performed. The number of reverse frequency adjustments are less than the number of earlier opposite frequency adjustments, preferably by a factor of two. The reverse corrections converge the output clock frequency toward the input clock frequency, reducing oscillations.

    摘要翻译: 在数据通信网络中,可以通过在连续时段期间测量数据速率在接收机处推断系统时钟速率。 该信息用于将接收机输出时钟调整或调整为推断的系统时钟。 为了将接收缓冲器输出时钟频率调整到缓冲器输入时钟频率,定期监视缓冲器的电平。 如果填充电平大于上限阈值,则输出时钟频率递增。 如果填充电平小于下限阈值,则输出时钟频率递减。 在填充水平超出由阈值界定的范围之外时,维持连续调整操作次数的计数。 当填充水平返回到有界范围时,执行多次反向频率调整。 反向频率调整的数量小于较早的相对频率调整的数量,优选为2倍。 反向校正将输出时钟频率收敛到输入时钟频率,从而减少振荡。

    Synchronization device for performing synchronous circuit switching
functions thru an asynchronous communication node
    5.
    发明授权
    Synchronization device for performing synchronous circuit switching functions thru an asynchronous communication node 失效
    用于通过异步通信节点执行同步电路切换功能的同步装置

    公开(公告)号:US5325404A

    公开(公告)日:1994-06-28

    申请号:US836492

    申请日:1992-02-18

    IPC分类号: H04J3/06 H04L7/00 H04Q11/04

    CPC分类号: H04J3/062 H04Q11/04

    摘要: In a communication node (10) which comprises switching device (24) operating under control of a clock signal of period T for exchanging information slots carried in external frames of period T' comprising n slots, with each slot comprising a x-bit data byte, between external Time Division Multiplex TDM links (12,14) attached to the communication node, a synchronization device prevents the slippage phenomena due to the asynchronies between T and T' from causing a loss of data slots by generating at the input of the switching means internal frames from the received external frames. These internal frames are synchronous with the clock signal of period T and have a format which allows the slippage to be compensated.

    摘要翻译: 在包括在周期T的时钟信号的控制下操作的交换设备(24)的通信节点(10)中,用于交换在包括n个时隙的周期T'的外部帧中携带的信息时隙,每个时隙包括x位数据字节 ,在连接到通信节点的外部时分复用TDM链路(12,14)之间,同步设备防止由于T和T'之间的异步而导致的数据时隙的丢失导致在切换的输入处产生的滑动现象 指从接收的外部帧的内部帧。 这些内部帧与周期T的时钟信号同步,并具有允许补偿滑动的格式。

    System and Method for Measuring Power of Optical Signals Carried Over a Fiber Optic Link
    9.
    发明申请
    System and Method for Measuring Power of Optical Signals Carried Over a Fiber Optic Link 失效
    通过光纤链路测量光信号功率的系统和方法

    公开(公告)号:US20060250608A1

    公开(公告)日:2006-11-09

    申请号:US11428987

    申请日:2006-07-06

    IPC分类号: G01J1/00

    摘要: A pilot tone generator receives optical energy from an optical communication medium carrying a plurality of optical signals. Each optical signal carries data modulated at a unique wavelength and further modulated with a unique identification signal. The identification signal has an amplitude corresponding to an optical power of the associated optical signal. The pilot tone receiver detects each identification signal from the optical energy received and determines its corresponding amplitude. The pilot tone receiver calculates the optical power of each optical signal in the optical energy in response to the amplitude of the associated identification signal.

    摘要翻译: 导频音产生器从携带多个光信号的光通信介质接收光能。 每个光信号承载以独特波长进行调制的数据,并用唯一的识别信号进一步调制。 识别信号具有对应于相关联的光信号的光功率的幅度。 导频音接收器从接收的光能检测每个识别信号,并确定其对应的幅度。 导频音接收器响应于相关联的识别信号的幅度来计算光能中每个光信号的光功率。