公开(公告)号：US20070261059A1

公开(公告)日：2007-11-08

申请号：US11410398

申请日：2006-04-25

申请人： Joseph Orth ,  Erin Handgen ,  Leith Johnson ,  Jonathan Lotz

发明人： Joseph Orth ,  Erin Handgen ,  Leith Johnson ,  Jonathan Lotz

IPC分类号： G06F9/46

CPC分类号： G06F12/0284

摘要： Array based memory abstraction in a multiprocessor computing system is disclosed. A plurality of memory resources are operably connected to an interconnect fabric. In a plurality of memory blocks, each memory block represents a contiguous portion of the plurality of memory resources. A cell is operably connected to the interconnect fabric. The cell has an agent with a fabric abstraction block, and the fabric abstraction block includes a block table having an entry for each of the plurality of memory blocks. A memory controller is associated with the agent, is operably connected to the interconnect fabric, and is configured to control a portion of the plurality of memory blocks.

摘要翻译： 公开了一种在多处理器计算系统中的基于阵列的存储器抽象。 多个存储器资源可操作地连接到互连结构。 在多个存储块中，每个存储块表示多个存储器资源的连续部分。 电池可操作地连接到互连织物。 所述小区具有具有织物抽象块的代理，并且所述结构抽象块包括具有用于所述多个存储器块中的每一个的条目的块表。 存储器控制器与代理相关联，可操作地连接到互连结构，并且被配置为控制多个存储器块的一部分。

公开(公告)号：US20070255906A1

公开(公告)日：2007-11-01

申请号：US11413158

申请日：2006-04-27

申请人： Erin Handgen ,  Patrick Knebel

发明人： Erin Handgen ,  Patrick Knebel

IPC分类号： G06F13/28

CPC分类号： G06F12/0817 ,  G06F2212/2542 ,  Y02D10/13

摘要： Coherency directory updating is provided in a multiprocessor computing system. A plurality of memory resources have a directory, and are operably connected to an interconnect fabric. A cell is operably connected to the interconnect fabric. The cell has a cache including an entry for each of a plurality of coherency units, each coherency unit included in a memory block representing a contiguous portion of the plurality of memory resources. A controller is operably connected to the interconnect fabric. The controller is configured to control a portion of the plurality of memory resources, and has a comparator configured to identify whether a memory block is local. If the memory block is local, the controller is configured to set a state of the directory to exclusive for a write transaction. If the memory block is not local, the controller is configured to set the state to invalid for a write transaction.

摘要翻译： 在多处理器计算系统中提供了一致性目录更新。 多个存储器资源具有目录，并且可操作地连接到互连结构。 电池可操作地连接到互连织物。 该小区具有包括多个相关性单元中的每一个的条目的高速缓存，每个相关性单元包括在表示多个存储器资源的连续部分的存储器块中。 控制器可操作地连接到互连结构。 控制器被配置为控制多个存储器资源的一部分，并且具有被配置为识别存储器块是否是本地的比较器。 如果内存块是本地的，则控制器被配置为将目录的状态设置为独占的写事务。 如果内存块不是本地的，则控制器被配置为将写入事务的状态设置为无效。

公开(公告)号：US20050080958A1

公开(公告)日：2005-04-14

申请号：US10630260

申请日：2003-07-30

申请人： Erin Handgen ,  Eri Rentschler ,  Michael Tayler

发明人： Erin Handgen ,  Eri Rentschler ,  Michael Tayler

IPC分类号： G06F13/00 ,  G06F13/40

CPC分类号： G06F13/4018

摘要： An integrated circuit component is provided comprising logic capable of being configured to interface with a first companion integrated circuit and to receive information that is communicated from the first companion integrated circuit, which information was communicated to the first companion integrated circuit via a first portion of a system bus. The integrated circuit component further comprises logic capable of being configured to interface with a second companion integrated circuit and to receive information that is communicated from the second companion integrated circuit, which information was communicated to the second companion integrated circuit via a second portion of the system bus

摘要翻译： 提供了集成电路组件，其包括逻辑，其能够被配置为与第一伴侣集成电路接口并且接收从第一伴侣集成电路传送的信息，该信息经由第一伴侣集成电路的第一部分被传送到第一伴侣集成电路 系统总线 集成电路组件还包括能够被配置为与第二伴侣集成电路接口并且接收从第二伴随集成电路传送的信息的逻辑，该信息经由系统的第二部分被传送到第二伴随集成电路 总线