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公开(公告)号：US08922719B2
公开(公告)日：2014-12-30
申请号：US12039250
申请日：2008-02-28
申请人： Gerd Spalink , Ben Eitel
发明人： Gerd Spalink , Ben Eitel
CPC分类号： H03D3/241
摘要： Circuit for processing an input signal based on at least one reference signal, comprising a phase locked loop demodulator configured to receive a speed control signal and said input signal and further configured to follow a frequency and/or a phase of said input signal at a speed, wherein said speed depends on said speed control signal; and a reference signal detector configured to determine said at least one reference signal and to set said speed by outputting said speed control signal to said phase locked loop demodulator, wherein, if said reference signal detector detects said at least one reference signal, said reference signal detector decreases said speed.
摘要翻译： 一种用于基于至少一个参考信号处理输入信号的电路，包括：锁相环解调器，被配置为接收速度控制信号和所述输入信号，并进一步被配置为以一定的速度跟随所述输入信号的频率和/或相位 ，其中所述速度取决于所述速度控制信号; 以及参考信号检测器，被配置为通过将所述速度控制信号输出到所述锁相环解调器来确定所述至少一个参考信号并设置所述速度，其中如果所述参考信号检测器检测到所述至少一个参考信号，则所述参考信号 检测器降低所述速度。
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公开(公告)号：US20110242429A1
公开(公告)日：2011-10-06
申请号：US12864573
申请日：2008-12-23
申请人： Rolf Noethlings , Gerd Spalink
发明人： Rolf Noethlings , Gerd Spalink
IPC分类号： H04N5/455
CPC分类号： H04L27/00 , G10L19/005 , H04L27/22 , H04L27/38
摘要： A method of demodulation includes determining samples of a modulated analogue audio signal; determining at least one distorted sample of the samples depending on the signal quality of the modulated analogue audio signal; and replacing the distorted sample.
摘要翻译： 一种解调方法包括：确定调制模拟音频信号的样本; 根据所调制的模拟音频信号的信号质量来确定样本的至少一个失真采样; 并替换失真的样品。
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公开(公告)号：US07184449B2
公开(公告)日：2007-02-27
申请号：US09972208
申请日：2001-10-05
申请人： Gerd Spalink
发明人： Gerd Spalink
IPC分类号： H04J3/06
CPC分类号： G06F1/14 , H04J3/0655 , H04L12/40078 , H04L12/4035
摘要： A method to perform a cycle synchronization between interconnected sub-networks, in which a reference node connected to one of the sub-networks transmits a respective cycle time information to cycle masters of all other sub-networks at recurring time instants, and the cycle masters of all other sub-networks adjust their cycle time accordingly. An adjustment of the cycle time within a cycle master is performed by determining a first time interval (Δt1, Δt1′) in-between two receptions of cycle time information from the reference node with an own clock, determining a second time interval (Δt2, Δt2′) in-between two corresponding transmissions of cycle time information from the reference node on basis of the received cycle time information, comparing the first time interval (Δt1, Δt1′) and the second time interval (Δt2, Δt2′), and adjusting the own cycle length according to the comparison result.
摘要翻译： 一种在相互连接的子网之间执行周期同步的方法，其中连接到一个子网络的参考节点发送相应的周期时间信息，以循环时间周期的所有其他子网络的周期主站，以及循环主站 所有其他子网络相应地调整其周期时间。 通过确定在循环时间信息的两次接收之间的第一时间间隔（Deltat 1，Deltat 1＆lt; 1＆gt;）来执行循环主机内的循环时间的调整， 具有自己的时钟的参考节点，确定来自参考节点的循环时间信息的两个对应的传输之间的第二时间间隔（Deltat 2，Deltat 2＆lt; 2＆gt;） 基于接收到的周期时间信息，将第一时间间隔（Deltat1＆lt; 1＆gt;，Deltat1＆lt; 1＆gt;）与第二时间间隔（Deltat2＆lt; ，Deltat <2> ），并根据比较结果调整自身的周期长度。
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公开(公告)号：US07180904B2
公开(公告)日：2007-02-20
申请号：US09751882
申请日：2000-12-29
申请人： Gralf Gaedeken , Peter Buchner , Gerd Spalink
发明人： Gralf Gaedeken , Peter Buchner , Gerd Spalink
CPC分类号： H04L12/40058 , H04L12/2803 , H04L12/2832 , H04L12/2838 , H04L12/40071 , H04L12/40091 , H04L12/40097 , H04L12/40117 , H04L12/4625 , H04L12/6418 , H04L69/08
摘要： An interface link layer device of an interface which allows the interconnection of different networks to build a distributed network, The interface link layer routes complete data packets directly to another interface link layer device that serves the destination via uplink to accept a data packet from a first data bus that has a predetermined destination on a second data bus and to transmit the data packet via a transmission path to interface link layer device. The interface link layer also using downlink to output data packets received via the transmission path from another interface link layer device to a predetermined destination on the first data bus. Further, the interface link layer device is configured such that not all packets have to be transmitted via the interface on basis of an appropriate acknowledge code and response packet generation included in the interface link layer device.
摘要翻译： 接口的接口链路层设备，允许不同网络互连建立分布式网络。接口链路层将完整的数据包直接传递到另一个通过上行链路服务目的地的接口链路层设备，以接收来自第一个 数据总线，其在第二数据总线上具有预定的目的地，并且经由传输路径将数据分组发送到接口链路层设备。 接口链路层还使用下行链路来输出经由从另一接口链路层设备到第一数据总线上的预定目的地的传输路径接收的数据分组。 此外，接口链路层设备被配置为使得不是所有分组都必须基于接口链路层设备中包括的适当的确认码和响应分组生成经由接口来发送。
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公开(公告)号：US20050177626A1
公开(公告)日：2005-08-11
申请号：US11051408
申请日：2005-02-04
申请人： Volker Freiburg , Gerd Spalink , Peter Wagner
发明人： Volker Freiburg , Gerd Spalink , Peter Wagner
CPC分类号： G11B27/105 , G11B20/10
摘要： A system (1) for storing and rendering multimedia data comprises: a multimedia content archive (2) for storing multimedia data files (10, 13) to be rendered, a transforming algorithm archive (3) for storing transforming algorithm description files (12, 14, 15) comprising information for transforming multimedia data file (10, 13) of a first format into multimedia data files of a second format, respectively, wherein each stored multimedia data file (10, 13) is individually linked to at least one of said transforming algorithm description files (12, 14, 15), at least one rendering device (4a, 4b) being connected to said multimedia content archive (2) and said transforming algorithm archive (3), said at least one rendering device (4a, 4b) being capable of rendering a specific multimedia data file (10, 13) in dependence of transforming algorithm description files (12, 14, 15), to which said specific multimedia data file (10, 13) is linked to, respectively.
摘要翻译： 一种用于存储和呈现多媒体数据的系统（1），包括：用于存储要呈现的多媒体数据文件（10,13）的多媒体内容存档（2），用于存储变换算法描述文件（12， 包括用于将第一格式的多媒体数据文件（10,13）分别转换为第二格式的多媒体数据文件的信息，其中每个存储的多媒体数据文件（10,13）被单独地链接到 所述变换算法描述文件（12,14,15），连接到所述多媒体内容存档（2）和所述变换算法存档（3）的至少一个渲染设备（4a，4b），所述至少一个渲染设备 （4a，4b）能够根据所述特定多媒体数据文件（10,13）链接到的变换算法描述文件（12,14,15）来呈现特定的多媒体数据文件（10,13） 分别。
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公开(公告)号：US06816560B1
公开(公告)日：2004-11-09
申请号：US09610460
申请日：2000-07-05
申请人： Gerd Spalink
发明人： Gerd Spalink
IPC分类号： H04L700
CPC分类号： H04N21/4302 , H04L7/042 , H04L7/08 , H04N19/00 , H04N19/70 , H04N21/242
摘要： A packet synchronization detector for an incoming digital signal which includes a regularly repeated predetermined synchronization pattern which repetition rate defines the length of one transmission packet according to the present invention comprises a synchronization pattern detector (1) and several synchronization state machines (2, 31, . . . , 3n) which respectively determine whether or not one detected synchronization pattern with a respective position in regard to the length of one transmission frame has the correct repetition rate to determine whether or not lock has been achieved. Therefore, a very fast lock is achieved, since also in case of bit patterns that match to the synchronization byte, but that are not the synchronization byte no penalty time occurs to lock to the incoming digital signal.
摘要翻译： 一种用于输入数字信号的分组同步检测器，其包括根据本发明的重复率定义一个传输分组的长度的规则重复的预定同步模式，包括同步模式检测器（1）和多个同步状态机（2,31， ...，3n），其分别确定一个检测到的与一个传输帧的长度相对应的位置的同步模式是否具有正确的重复率，以确定是否已经实现了锁定。 因此，实现非常快速的锁定，因为在与同步字节匹配的位模式的情况下，但是不是同步字节，因此锁定到输入数字信号不发生惩罚时间。
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公开(公告)号：US09001919B2
公开(公告)日：2015-04-07
申请号：US13383089
申请日：2010-07-01
申请人： Andreas Schwager , Gerd Spalink
发明人： Andreas Schwager , Gerd Spalink
CPC分类号： H04B15/005 , H04B3/54 , H04B17/29 , H04B2203/5425 , H04L5/0023 , H04L5/0048 , H04L5/0051 , H04L25/0204 , H04L25/0226 , H04L25/03828 , H04L27/2605 , H04L27/2626 , H04L27/3411
摘要： A communications system includes a receiver unit connected with a transmission channel. The receiver unit determines a signal power of a first communications signal received over the transmission channel. A transmitter unit is connected with the transmission channel and transmits a second communications signal, wherein a gain of the communications signal being output by the transmitter unit is controllable. A control unit controls the gain of the transmitter unit in response to the determined signal power. At the receiver unit, detection of broadcast signal ingress during data communication is improved and methods for avoiding disturbances between coexisting communications systems may become more reliable. Different distances between successive training symbols suitable for channel estimation may be provided to enhance the noise measurement.
摘要翻译： 通信系统包括与传输信道连接的接收机单元。 接收机单元确定通过传输信道接收的第一通信信号的信号功率。 发射机单元与传输信道连接并发送第二通信信号，其中由发射机单元输出的通信信号的增益是可控的。 控制单元响应于确定的信号功率来控制发射机单元的增益。 在接收机单元，改善数据通信期间广播信号入口的检测，避免共存通信系统之间干扰的方法可能变得更加可靠。 可以提供适合于信道估计的连续训练符号之间的不同距离，以增强噪声测量。
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公开(公告)号：US08849230B2
公开(公告)日：2014-09-30
申请号：US13364853
申请日：2012-02-02
申请人： Gerd Spalink
发明人： Gerd Spalink
CPC分类号： H03G3/3068
摘要： A semiconductor device is provided, including an input attenuator configured to receive an antenna signal and to output a first attenuated signal, the first attenuated signal corresponding to the antenna signal attenuated by a first attenuation factor, the input attenuator being further configured to receive a control signal and to select one of a plurality of predetermined attenuation factors as said first attenuation factor depending on the control signal; an analog to digital converter configured to generate an intermediate signal by digitizing the first attenuated signal; and a digital attenuator configured to receive the intermediate signal and to output a second attenuated signal, the second attenuated signal corresponding to the intermediate signal attenuated by a second attenuation factor, the second attenuation factor being set so as to compensate a gain quantization error of the control signal.
摘要翻译： 提供一种半导体器件，包括：输入衰减器，被配置为接收天线信号并输出第一衰减信号，所述第一衰减信号对应于被第一衰减因子衰减的天线信号，所述输入衰减器还被配置为接收控制 信号，并且根据控制信号选择多个预定衰减因子中的一个作为所述第一衰减因子; 模数转换器，被配置为通过数字化第一衰减信号来产生中间信号; 以及数字衰减器，被配置为接收所述中间信号并输出第二衰减信号，所述第二衰减信号对应于由第二衰减因子衰减的所述中间信号，所述第二衰减因子被设置为补偿所述第二衰减信号的增益量化误差 控制信号。
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9.发明授权Analog TV broadcast signal receiving apparatus and analog TV broadcast signal demodulating apparatus 有权模拟电视广播信号接收装置和模拟电视广播信号解调装置公开(公告)号：US08264617B2
公开(公告)日：2012-09-11
申请号：US12413908
申请日：2009-03-30
IPC分类号： H04N5/455
摘要： Disclosed herein is an analog television broadcast signal receiving apparatus including: a tuner section configured to convert an analog television broadcast signal into a predetermined intermediate frequency band signal; a demodulation circuit section configured to obtain a picture output signal and a sound intermediate frequency signal from the predetermined intermediate frequency band signal coming from the tuner section; a picture processing circuit section configured to convert the picture output signal into a display-ready picture signal; a sound demodulation processing circuit section configured to demodulate the sound intermediate frequency signal; and a control section.
摘要翻译： 这里公开了一种模拟电视广播信号接收装置，包括：调谐器部分，被配置为将模拟电视广播信号转换成预定的中频带信号; 解调电路部，被配置为从所述调谐器部分获得来自所述预定中频带信号的图像输出信号和声音中频信号; 图像处理电路部分，被配置为将图像输出信号转换为显示就绪图像信号; 声音解调处理电路部，被配置为对声音中频信号进行解调; 和控制部分。
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公开(公告)号：US07995690B2
公开(公告)日：2011-08-09
申请号：US12032129
申请日：2008-02-15
申请人： Gerd Spalink
发明人： Gerd Spalink
IPC分类号： H04B1/10
CPC分类号： H03H17/025
摘要： Digital filter (104), comprising: a first frequency shifting mechanism (106) configured to shift an input spectrum (H(f)) of an input signal (100) by a first frequency distance (F1) to obtain a shifted frequency signal (122) with a shifted spectrum; a filter (108), configured to filter said shifted frequency signal with a predetermined transfer function to obtain a filtered signal (130); and a signal processor (110), said signal processor including: an adder (202), and at least a second frequency shifting mechanism (222), said signal processor (110) being configured to generate an output signal (140), which is a sum of said filtered signal (130) and said shifted frequency signal (122) and said output signal (140) has an output spectrum, which is shifted by a second frequency distance (DF) with respect to said shifted spectrum, wherein said second frequency distance (DF) is independent of said first frequency distance (F1).
摘要翻译： 数字滤波器（104），包括：第一频移机构（106），被配置为将输入信号（100）的输入频谱（H（f））移位第一频率距离（F1），以获得移位频率信号 122）; 滤波器（108），被配置为用预定的传递函数对所述移位的频率信号进行滤波以获得滤波信号（130）; 和信号处理器（110），所述信号处理器包括：加法器（202）和至少第二频移机构（222），所述信号处理器（110）被配置为产生输出信号（140） 所述滤波信号（130）和所述移位频率信号（122）和所述输出信号（140）的和具有相对于所述移位频谱偏移了第二频率距离（DF）的输出频谱，其中所述第二 频率距离（DF）与所述第一频率距离（F1）无关。
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