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公开(公告)号:US20100151639A1
公开(公告)日:2010-06-17
申请号:US12712518
申请日:2010-02-25
Applicant: Shau-Lin Shue , Chen-Hua Yu , Cheng-Tung Lin , Chii-Ming Wu , Shih-Wei Chou , Gin Jei Wang , CP Lo , Chih-Wei Chang
Inventor: Shau-Lin Shue , Chen-Hua Yu , Cheng-Tung Lin , Chii-Ming Wu , Shih-Wei Chou , Gin Jei Wang , CP Lo , Chih-Wei Chang
IPC: H01L21/336 , H01L21/28
CPC classification number: H01L29/665 , H01L21/76243 , H01L29/785
Abstract: Provided is a method of fabrication a semiconductor device that includes providing a semiconductor substrate, forming a gate structure over the substrate, the gate structure including a gate dielectric and a gate electrode disposed over the gate dielectric, forming source/drain regions in the semiconductor substrate at either side of the gate structure, forming a metal layer over the semiconductor substrate and the gate structure, the metal layer including a refractory metal layer or a refractory metal compound layer; forming an alloy layer over the metal layer; and performing an annealing thereby forming metal alloy silicides over the gate structure and the source/drain regions, respectively.
Abstract translation: 提供一种制造半导体器件的方法,其包括提供半导体衬底,在衬底上形成栅极结构,栅极结构包括栅极电介质和设置在栅极电介质上的栅电极,在半导体衬底中形成源极/漏极区域 在栅极结构的任一侧,在半导体衬底和栅极结构之上形成金属层,金属层包括难熔金属层或难熔金属化合物层; 在所述金属层上形成合金层; 并进行退火,从而分别在栅极结构和源极/漏极区域上形成金属合金硅化物。
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公开(公告)号:US20060205235A1
公开(公告)日:2006-09-14
申请号:US11420900
申请日:2006-05-30
Applicant: Gin Jei Wang , Chao-Hsien Peng , Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue
Inventor: Gin Jei Wang , Chao-Hsien Peng , Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue
IPC: H01L21/31 , H01L21/469
CPC classification number: H01L21/76843 , H01L21/02129 , H01L21/022 , H01L21/0228 , H01L21/28562 , H01L21/31625 , H01L23/482 , H01L29/78 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor device and fabrication thereof. An opening is formed in a first dielectric layer, exposing an active region of the transistor, and an atomic layer deposited (ALD) TaN barrier is conformably formed in the opening, at a thickness less than 20 Å. A copper layer is formed over the atomic layer deposited (ALD) TaN barrier to fill the opening.
Abstract translation: 半导体器件及其制造。 在第一电介质层中形成开口,暴露晶体管的有源区,并且在开口中以厚度小于等于一致地形成原子层沉积(ALD)TaN势垒。 在原子层沉积(ALD)TaN势垒上形成铜层以填充开口。
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公开(公告)号:US07405151B2
公开(公告)日:2008-07-29
申请号:US11420900
申请日:2006-05-30
Applicant: Gin Jei Wang , Chao-Hsien Peng , Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue
Inventor: Gin Jei Wang , Chao-Hsien Peng , Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue
IPC: H01L21/4763
CPC classification number: H01L21/76843 , H01L21/02129 , H01L21/022 , H01L21/0228 , H01L21/28562 , H01L21/31625 , H01L23/482 , H01L29/78 , H01L2924/0002 , H01L2924/00
Abstract: A method for forming a semiconductor device is described. An opening is formed in a first dielectric layer, exposing an active region of the transistor, and an atomic layer deposited (ALD) TaN barrier is conformably formed in the opening, at a thickness less than 20 Å. A copper layer is formed over the atomic layer deposited (ALD) TaN barrier to fill the opening.
Abstract translation: 对半导体装置的形成方法进行说明。 在第一电介质层中形成开口,暴露晶体管的有源区,并且在开口中以厚度小于等于一致地形成原子层沉积(ALD)TaN势垒。 在原子层沉积(ALD)TaN势垒上形成铜层以填充开口。
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公开(公告)号:US07446042B2
公开(公告)日:2008-11-04
申请号:US11343648
申请日:2006-01-30
Applicant: Chii-Ming Wu , Shih-Wei Chou , Gin Jei Wang , Cheng-Tung Lin , Chih-Wei Chang , Shau-Lin Shue
Inventor: Chii-Ming Wu , Shih-Wei Chou , Gin Jei Wang , Cheng-Tung Lin , Chih-Wei Chang , Shau-Lin Shue
IPC: H01L21/44
CPC classification number: H01L21/28518
Abstract: A method for forming nickel silicide includes degassing a semiconductor substrate that includes a silicon surface. After the degassing operation, the substrate is cooled prior to a metal deposition process, during a metal deposition process, or both. The cooling suppresses the temperature of the substrate to a temperature less than the temperature required for the formation of nickel silicide. Nickel diffusion is minimized during the deposition process. After deposition, an annealing process is used to urge the formation of a uniform silicide film. In various embodiments, the metal film may include a binary phase alloy containing nickel and a further element.
Abstract translation: 一种形成硅化镍的方法包括对包含硅表面的半导体衬底脱气。 在脱气操作之后,在金属沉积工艺,金属沉积工艺期间或两者之间冷却基板。 冷却将基板的温度抑制到低于形成硅化镍所需的温度的温度。 在沉积过程中镍的扩散最小化。 沉积后,使用退火工艺来促使形成均匀的硅化物膜。 在各种实施例中,金属膜可以包括含有镍和另一元素的二元相合金。
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公开(公告)号:US20070066060A1
公开(公告)日:2007-03-22
申请号:US11230125
申请日:2005-09-19
Applicant: Gin-Jei Wang
Inventor: Gin-Jei Wang
IPC: H01L21/4763
CPC classification number: H01L21/28562 , C23C16/34 , C23C16/45525 , H01L21/76843 , H01L21/76876
Abstract: Semiconductor devices and fabrication methods thereof. An opening is formed in a first dielectric layer, exposing an active region of the transistor, and an tungsten-containing barrier is conformably formed in the opening, with a thickness less than 50 Å. A tungsten layer is formed over the atomic layer deposited (ALD) tungsten-containing barrier to fill the opening.
Abstract translation: 半导体器件及其制造方法。 在第一电介质层中形成开口,暴露晶体管的有源区,并且在开口中顺应地形成含钨屏障,厚度小于50。 在原子层沉积(ALD)含钨屏障上形成钨层以填充开口。
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