公开(公告)号：US08884629B1

公开(公告)日：2014-11-11

申请号：US13103894

申请日：2011-05-09

申请人： D V J Ravi Kumar ,  Theertham Srinivas ,  Gururaj Ghorpade

发明人： D V J Ravi Kumar ,  Theertham Srinivas ,  Gururaj Ghorpade

IPC分类号： G01R31/02 ,  H03M1/10 ,  H03M1/12

CPC分类号： G01R31/024 ,  H03F1/0277 ,  H03F3/38 ,  H03F3/393 ,  H03F3/45183 ,  H03F3/45192 ,  H03F3/45695 ,  H03F3/72 ,  H03F2200/261 ,  H03F2200/331 ,  H03F2200/411 ,  H03F2200/78 ,  H03F2203/45366 ,  H03F2203/45396 ,  H03F2203/45614 ,  H03F2203/45616 ,  H03F2203/45644 ,  H03F2203/45726 ,  H03F2203/7221 ,  H03F2203/7236 ,  H03M1/1004 ,  H03M1/122

摘要： A digital sensing device includes a sensor diagnostic system for detecting sensor fault conditions. The sensor diagnostic system including an input multiplexer applying a first burnout current or a second burnout current to a selected input channel and a near-rail detector configured to detect when an input voltage of the digital sensing device is near a positive power supply or near a negative power supply. The burnout current injection is applied without interfering with the sensor data. In other embodiments, the sensor diagnostic system may further include an overload detector configured to detect an overflow or underflow condition at the analog-to-digital converter. The sensor diagnostic system may further include a window comparator to detect when the ADC digital output is near a zero digital value. Finally, the sensor diagnostic system may further include a sensor flag generator to generate data flags indicative of sensor fault conditions.

摘要翻译： 数字感测装置包括用于检测传感器故障状况的传感器诊断系统。 所述传感器诊断系统包括对所选择的输入通道施加第一烧坏电流或第二烧坏电流的输入多路复用器和配置成检测所述数字感测装置的输入电压何时靠近正电源或接近正电源的近轨检测器 负电源。 在不干扰传感器数据的情况下施加烧断电流注入。 在其他实施例中，传感器诊断系统还可以包括被配置为检测模数转换器处的溢出或下溢条件的过载检测器。 传感器诊断系统还可以包括窗口比较器，用于检测ADC数字输出何时接近零数字值。 最后，传感器诊断系统还可以包括传感器标志发生器，以产生指示传感器故障状况的数据标志。

公开(公告)号：US07825837B1

公开(公告)日：2010-11-02

申请号：US12399797

申请日：2009-03-06

申请人： Priyanka Khasnis ,  DVJ Ravi Kumar ,  Theertham Srinivas ,  Vallamkonda Madhuri ,  Gururaj Ghorpade ,  Mehmet Aslan ,  Richard Dean Henderson

发明人： Priyanka Khasnis ,  DVJ Ravi Kumar ,  Theertham Srinivas ,  Vallamkonda Madhuri ,  Gururaj Ghorpade ,  Mehmet Aslan ,  Richard Dean Henderson

IPC分类号： H03M1/10

CPC分类号： H03M1/1023 ,  H03M1/1009 ,  H03M1/1014 ,  H03M1/12

摘要： A method for calibrating an analog-to-digital converter includes sampling an analog input signal and generating input samples, reversing the polarity of at least one input sample, averaging the digital output codes associated with a first pair of input samples where the first pair of input samples has opposite polarities, and generating an offset correction value being the average of the digital output codes associated with the first pair of input samples. In another embodiment, a method for calibrating an ADC includes sampling the analog input signal and generating input samples, introducing an incremental value to modify the magnitude of at least one input sample, computing an actual gain value using the digital output codes associated with a first input sample and a second input sample having the modified magnitude, and generating a gain correction value being the ratio of an ideal gain of the ADC to the actual gain.

摘要翻译： 用于校准模数转换器的方法包括对模拟输入信号进行采样并产生输入样本，反转至少一个输入样本的极性，对与第一对输入样本相关联的数字输出代码进行平均，其中第一对输入样本 输入样本具有相反的极性，并且产生作为与第一对输入样本相关联的数字输出代码的平均值的偏移校正值。 在另一个实施例中，一种用于校准ADC的方法包括对模拟输入信号进行采样并产生输入样本，引入增量值以修改至少一个输入样本的幅度，使用与第一个输入样本相关联的数字输出代码来计算实际增益值 输入采样和具有修改的幅度的第二输入采样，并且产生增益校正值，该增益校正值是ADC的理想增益与实际增益的比率。

公开(公告)号：US08330537B1

公开(公告)日：2012-12-11

申请号：US13051929

申请日：2011-03-18

申请人： Gururaj Ghorpade ,  Theertham Srinivas ,  D V J Ravi Kumar ,  Mehmet Aslan ,  K. Krishna Mahesh

发明人： Gururaj Ghorpade ,  Theertham Srinivas ,  D V J Ravi Kumar ,  Mehmet Aslan ,  K. Krishna Mahesh

IPC分类号： H03F1/02

CPC分类号： G01R31/024 ,  H03F1/0277 ,  H03F3/38 ,  H03F3/393 ,  H03F3/45183 ,  H03F3/45192 ,  H03F3/45695 ,  H03F3/72 ,  H03F2200/261 ,  H03F2200/331 ,  H03F2200/411 ,  H03F2200/78 ,  H03F2203/45366 ,  H03F2203/45396 ,  H03F2203/45614 ,  H03F2203/45616 ,  H03F2203/45644 ,  H03F2203/45726 ,  H03F2203/7221 ,  H03F2203/7236 ,  H03M1/1004 ,  H03M1/122

摘要： A rail-to-rail buffer receiving a differential input signal and generating a differential output signal includes first and second amplifier circuits configured in a pseudo differential buffer structure and first and second comparators coupled to compare the respective part of the differential input signal and a first voltage and to generate select signals. Each of the first and second amplifier circuits includes first and second complementary differential input stages and the first and second comparators generate respective select signals to turn on only one of the first or the second differential input stage in each amplifier circuit depending on a value of the respective part of the differential input signal. In operation, the first and second complementary differential input stages of each amplifier circuit not being turned on at the same time.

摘要翻译： 接收差分输入信号并产生差分输出信号的轨到轨缓冲器包括以伪差分缓冲器结构配置的第一和第二放大器电路，第一和第二比较器耦合以比较差分输入信号的相应部分和第一 电压并产生选择信号。 第一和第二放大器电路中的每一个包括第一和第二互补差分输入级，并且第一和第二比较器产生相应的选择信号，以根据所述第一和第二互补差分输入级的值，仅导通每个放大器电路中的第一或第二差分输入级中的一个 差分输入信号的各部分。 在操作中，每个放大器电路的第一和第二互补差分输入级不同时导通。

公开(公告)号：US07825838B1

公开(公告)日：2010-11-02

申请号：US12399804

申请日：2009-03-06

申请人： Theertham Srinivas ,  Vallamkonda Madhuri ,  DVJ Ravi Kumar ,  Gururaj Ghorpade ,  Priyanka Khasnis ,  Mehmet Aslan ,  Richard Dean Henderson

发明人： Theertham Srinivas ,  Vallamkonda Madhuri ,  DVJ Ravi Kumar ,  Gururaj Ghorpade ,  Priyanka Khasnis ,  Mehmet Aslan ,  Richard Dean Henderson

IPC分类号： H03M1/10

CPC分类号： H03M1/1023 ,  H03M1/1009 ,  H03M1/1014 ,  H03M1/12

摘要： A method for removing component mismatch errors for a system parameter being set by a ratio of two or more physical, electrical components (“components”) of the same kind on an integrated circuit including providing an array of component units having the same component value, determining the actual component values of each component unit in the array, selecting component units based on the actual component values to form pairs of component units where the pairs have approximately the same total component values, ordering the component unit pairs, assigning alternate component unit pairs to be associated with each of the two or more components, rotating at a first frequency the assignment of the component unit pairs. At each rotation, the component unit pairs to be associated with each component are shifted so that each component unit pair is associated with a different one of the two or more components in turn.

摘要翻译： 一种用于去除系统参数的组件失配误差的方法，该系统参数由集成电路上相同类型的两个或更多个物理，电组件（“组件”）的比例设置，包括提供具有相同组件值的组件单元阵列， 确定阵列中每个组件单元的实际组件值，基于实际组件值选择组件单元，以形成成对组件单元，其中对具有大致相同的总组件值，排序组件单元对，分配备用组件单元对 与两个或更多个部件中的每一个相关联，以第一频率旋转部件单元对的分配。 在每次旋转时，与每个组件相关联的组件单元对被移位，使得每个组件单元对依次与两个或更多个组件中的不同组件相关联。

公开(公告)号：US08330631B2

公开(公告)日：2012-12-11

申请号：US12907589

申请日：2010-10-19

申请人： DVJ Ravi Kumar ,  Priyanka Khasnis ,  Gururaj Ghorpade ,  Theertham Srinivas ,  Srinath B. Pai ,  Vallamkonda Madhuri

发明人： DVJ Ravi Kumar ,  Priyanka Khasnis ,  Gururaj Ghorpade ,  Theertham Srinivas ,  Srinath B. Pai ,  Vallamkonda Madhuri

IPC分类号： H03M1/10

CPC分类号： H03F3/72 ,  H03F3/45475 ,  H03F2203/45048 ,  H03F2203/45138 ,  H03F2203/45534 ,  H03F2203/7231 ,  H03M3/384

摘要： A method for calibrating a fixed gain amplifier configured as a front-end amplification stage of an analog-to-digital converter including sampling a calibration voltage with normal and inversed polarity and with the fixed gain amplifier bypassed and with the fixed gain amplifier connected. An actual gain value of the fixed gain amplifier is computed from offset corrected digital output codes generated from converting the calibration voltage. A gain correction value for the fixed gain amplifier can then be computed based on the ratio of the actual gain to the ideal gain. In another embodiment, a method for calibrating an analog-to-digital converter including a fixed gain amplifier, an input buffer and a modulator generates an offset correction value using normal and polarity inversed input samples. The offset correct value provides correction for at least offset errors in the fixed gain amplifier, the input buffer and the modulator.

摘要翻译： 一种用于校准被配置为模数转换器的前端放大级的固定增益放大器的方法，包括对具有正常和反相极性的校准电压进行采样，并且与固定增益放大器旁路并与固定增益放大器相连。 固定增益放大器的实际增益值由从转换校准电压产生的偏移校正数字输出代码计算。 然后可以基于实际增益与理想增益的比值来计算固定增益放大器的增益校正值。 在另一个实施例中，用于校准包括固定增益放大器，输入缓冲器和调制器的模数转换器的方法使用正常和极性反相输入样本产生偏移校正值。 偏移正确值为固定增益放大器，输入缓冲器和调制器中的至少偏移误差提供校正。

公开(公告)号：US20120119930A1

公开(公告)日：2012-05-17

申请号：US12907589

申请日：2010-10-19

申请人： DVJ Ravi Kumar ,  Priyanka Khasnis ,  Gururaj Ghorpade ,  Theertham Srinivas ,  Srinath B. Pai ,  Vallamkonda Madhuri

发明人： DVJ Ravi Kumar ,  Priyanka Khasnis ,  Gururaj Ghorpade ,  Theertham Srinivas ,  Srinath B. Pai ,  Vallamkonda Madhuri

IPC分类号： H03M1/06

CPC分类号： H03F3/72 ,  H03F3/45475 ,  H03F2203/45048 ,  H03F2203/45138 ,  H03F2203/45534 ,  H03F2203/7231 ,  H03M3/384

摘要： A method for calibrating a fixed gain amplifier configured as a front-end amplification stage of an analog-to-digital converter including sampling a calibration voltage with normal and inversed polarity and with the fixed gain amplifier bypassed and with the fixed gain amplifier connected. An actual gain value of the fixed gain amplifier is computed from offset corrected digital output codes generated from converting the calibration voltage. A gain correction value for the fixed gain amplifier can then be computed based on the ratio of the actual gain to the ideal gain. In another embodiment, a method for calibrating an analog-to-digital converter including a fixed gain amplifier, an input buffer and a modulator generates an offset correction value using normal and polarity inversed input samples. The offset correct value provides correction for at least offset errors in the fixed gain amplifier, the input buffer and the modulator.

摘要翻译： 一种用于校准被配置为模数转换器的前端放大级的固定增益放大器的方法，包括对具有正常和反相极性的校准电压进行采样，并且与固定增益放大器旁路并与固定增益放大器相连。 固定增益放大器的实际增益值由从转换校准电压产生的偏移校正数字输出代码计算。 然后可以基于实际增益与理想增益的比值来计算固定增益放大器的增益校正值。 在另一个实施例中，用于校准包括固定增益放大器，输入缓冲器和调制器的模数转换器的方法使用正常和极性反相输入样本产生偏移校正值。 偏移正确值为固定增益放大器，输入缓冲器和调制器中的至少偏移误差提供校正。