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公开(公告)号：US20190190473A1
公开(公告)日：2019-06-20
申请号：US16282208
申请日：2019-02-21
Applicant: STMicroelectronics S.r.l.
Inventor： Edoardo Marino
CPC classification number: H03F3/45475 , H03F3/183 , H03F3/187 , H03F3/45941 , H03F2200/03 , H03F2200/129 , H03F2203/45116 , H03F2203/45138 , H03F2203/45418 , H03F2203/45424 , H03F2203/45512 , H03F2203/45518 , H03F2203/45544 , H03F2203/45552 , H03F2203/45594 , H04R3/00 , H04R19/005 , H04R19/04 , H04R2201/003
Abstract: A circuit for amplifying signals from a Micro Electro-Mechanical System (MEMS) capacitive sensor is provided. First and second input nodes receive a sensing signal applied differentially between the input nodes. A first amplifier stage and a second amplifier stage, respectively, produce a differential output signal between first and second output nodes. A common mode signal is detected at the output nodes. A voltage divider having an intermediate tap node is coupled between the first output node and the second output node. A feedback stage is coupled between the intermediate tap node of the voltage divider and the inputs of the first amplifier stage and the second amplifier stage, where the feedback line is sensitive to the common mode signal at the output nodes.
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公开(公告)号：US20190068148A1
公开(公告)日：2019-02-28
申请号：US16100271
申请日：2018-08-10
Applicant: FUJITSU LIMITED
Inventor： Kazuaki Oishi
CPC classification number: H03G1/0029 , H03F1/3211 , H03F3/45179 , H03F3/45192 , H03F3/45197 , H03F3/45273 , H03F3/45475 , H03F3/45659 , H03F2200/171 , H03F2203/45 , H03F2203/45138 , H03F2203/45512 , H03F2203/45521
Abstract: An OTA circuit includes a first input stage that includes a first pair of transistors having sources coupled to a reference potential and converts a differential input voltage input to gates of the first pair of transistors into a first control current, a second input stage that includes a second pair of transistors having sources coupled to the reference potential and converts the differential input voltage input to gates of the second pair of transistors into a second control current, a first output circuit that generates one output current out of the differential output currents in accordance with the first control current, and a second output circuit that generates the other output current out of the differential output currents in accordance with the second control current.
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公开(公告)号：US20180323748A1
公开(公告)日：2018-11-08
申请号：US15887199
申请日：2018-02-02
Applicant: Microchip Technology Incorporated
Inventor： Serban Motoroiu , Jim Nolan
CPC classification number: H03F1/12 , H03F1/342 , H03F3/45179 , H03F3/45183 , H03F3/45672 , H03F2200/258 , H03F2200/261 , H03F2203/45048 , H03F2203/45138 , H03F2203/45341 , H03F2203/45342 , H03F2203/45466 , H03F2203/45494 , H03F2203/45504 , H03F2203/45511 , H03F2203/45521 , H03G1/0023 , H03G1/0029 , H03G1/0088
Abstract: A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a trimming circuit that trims the back-bias voltages of the transistors in each transconductor. The trimming circuit includes a plurality of selectable resistors disposed in the signal path of the tail current in each transconductor. Each of the plurality of selectable resistors has a switch coupled to it. When a switch is closed, only the resistors up to the respective switch are in the signal path of the bulk-to-source voltage of the differentially paired transistors. The resistor trimming circuit reduces the mismatch between transconductances of the respective differential pair transistors, in turn reducing mismatch of the overall transconductances of the transconductors, and thereby reducing the CFIA's gain error.
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公开(公告)号：US10063201B2
公开(公告)日：2018-08-28
申请号：US15820169
申请日：2017-11-21
Applicant: Renesas Electronics Corporation
Inventor： Masahide Kiritani
CPC classification number: H03G3/02 , H03F3/08 , H03F3/45475 , H03F3/50 , H03F2203/45138 , H03F2203/45522 , H03F2203/45528 , H03F2203/45534 , H03F2203/45591 , H03F2203/45601 , H03F2203/45616 , H03G3/08
Abstract: A semiconductor integrated circuit includes a first pad provided on one end side of a first resistive element and one end side of a second resistive element externally provided, a second pad provided on a different end side of the first resistive element, a third pad provided on a different end side of the second resistive element and one end side of a third resistive element externally provided, an operation amplifier, a first signal line, wired between an output terminal of the operation amplifier and the first pad, a second signal line wired between an inverting input terminal of the operation amplifier and the second pad, a third signal line wired between the inverting input terminal of the operational amplifier and the third pad, a first ESD protection element, provided to the first signal line, a fourth signal line, through which a voltage signal of the first pad.
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公开(公告)号：US20180219518A1
公开(公告)日：2018-08-02
申请号：US15887172
申请日：2018-02-02
Inventor： Jung Hyup Lee , Sehwan Lee , Minkyu Je
CPC classification number: H03F3/4565 , A61B5/0006 , A61B5/04001 , H02J1/10 , H03F3/345 , H03F3/393 , H03F3/45183 , H03F3/45224 , H03F3/45237 , H03F3/45475 , H03F3/72 , H03F2200/261 , H03F2203/45136 , H03F2203/45138 , H03F2203/45424 , H03F2203/45524 , H03F2203/45526
Abstract: Disclosed is a differential voltage supplying apparatus configured to supply, to a neural activity recorder, an input signal generated by combining, with a direct current (DC) power supply, a common-mode signal determined from a voltage applied to a detection electrode and a reference electrode connected to the neural activity recorder, and improve a common-mode rejection ratio of the neural activity recorder and generate a DC power supply.
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Patent Agency Ranking
6.发明申请公开(公告)号：US20180145639A1
公开(公告)日：2018-05-24
申请号：US15817527
申请日：2017-11-20
Applicant: SK hynix Inc.
Inventor： Tae-Gyu KIM
CPC classification number: H03F1/26 , H01L27/14643 , H03F1/308 , H03F3/3028 , H03F3/45 , H03F3/45475 , H03F2200/441 , H03F2203/30084 , H03F2203/30117 , H03F2203/45051 , H03F2203/45116 , H03F2203/45138 , H03F2203/45156 , H03F2203/45186
Abstract: An amplifier includes a differential amplification block suitable for receiving and amplifying a first differential input signal and a second differential input signal; an output block suitable for determining an output signal according to a state of amplified signals outputted from the differential amplification block; and an output range restriction block suitable for controlling an output range of the output signal outputted from the output block based on a maximum clamping signal and a minimum clamping signal.
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公开(公告)号：US20180145543A1
公开(公告)日：2018-05-24
申请号：US15357921
申请日：2016-11-21
Applicant: WiTricity Corporation
Inventor： Douglas S. Piasecki
CPC classification number: H02J50/60 , G01R17/16 , G01R19/0092 , H02J7/025 , H02J50/12 , H03F3/45071 , H03F3/45475 , H03F2200/408 , H03F2200/462 , H03F2203/45138 , H03F2203/45514 , H03F2203/45551
Abstract: A current shunt monitor (CSM) circuit for monitoring the current through a sense resistor. An analog circuit provides an analog output signal proportional to the voltage across the sense resistor. A power supply includes a fixed voltage power supply at a first voltage supply level and a floating power supply. The floating power supply operates at a second voltage supply level referenced from the voltage level on a voltage input and a floating ground. The voltage input varies from a voltage level above the first voltage supply level to a voltage level below the first voltage supply level, and the floating power supply provides power to the analog circuit at least when the voltage level of the voltage input is above the first voltage supply level. A crossover circuit switches power from the floating power to the fixed voltage power supply at the first voltage supply level upon detecting the voltage level on the voltage input proximate in value to the first voltage supply level.
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公开(公告)号：US20180109232A1
公开(公告)日：2018-04-19
申请号：US15294871
申请日：2016-10-17
Applicant: Realtek Semiconductor Corp.
Inventor： Ming-Cheng Chiang , Yan-Yu Lin
CPC classification number: H03F3/45475 , H03F3/187 , H03F3/45 , H03F3/45941 , H03F3/45946 , H03F2200/03 , H03F2200/165 , H03F2200/261 , H03F2200/267 , H03F2200/48 , H03F2203/45114 , H03F2203/45138 , H03F2203/45151 , H03F2203/45222 , H03F2203/45418 , H03F2203/45424
Abstract: An amplifier device includes an amplifier circuit, a feedback circuit, and a filter circuit. The amplifier circuit is configured to receive an input signal and a filtered signal, and to output a first output signal and a second output signal at a first output terminal and a second output terminal respectively. The first output signal and the second output signal are a pair of differential signals. The feedback circuit is configured to set direct current (DC) voltage levels of the first output signal and the second output signal to be at a predetermined voltage. The filter circuit is configured to low-pass filter the input signal or to low-pass filter the pair of differential signals so as to generate the filtered signal, and is configured to output the filtered signal to the amplifier circuit.
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公开(公告)号：US20180097492A1
公开(公告)日：2018-04-05
申请号：US15820169
申请日：2017-11-21
Applicant: Renesas Electronics Corporation
Inventor： Masahide Kiritani
CPC classification number: H03G3/02 , H03F3/08 , H03F3/45475 , H03F3/50 , H03F2203/45138 , H03F2203/45522 , H03F2203/45528 , H03F2203/45534 , H03F2203/45591 , H03F2203/45601 , H03F2203/45616 , H03G3/08
Abstract: A semiconductor integrated circuit includes a first pad provided on one end side of a first resistive element and one end side of a second resistive element externally provided, a second pad provided on a different end side of the first resistive element, a third pad provided on a different end side of the second resistive element and one end side of a third resistive element externally provided, an operation amplifier, a first signal line, wired between an output terminal of the operation amplifier and the first pad, a second signal line wired between an inverting input terminal of the operation amplifier and the second pad, a third signal line wired between the inverting input terminal of the operational amplifier and the third pad, a first ESD protection element, provided to the first signal line, a fourth signal line, through which a voltage signal of the first pad.
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10.发明申请公开(公告)号：US20180091231A1
公开(公告)日：2018-03-29
申请号：US15675927
申请日：2017-08-14
Applicant: Knowledge Development for POF SL
CPC classification number: H04B10/6931 , H03F3/45475 , H03F2203/45116 , H03F2203/45138 , H03F2203/45288 , H03G1/0035 , H03G3/001 , H03G3/3084 , H04B10/6933
Abstract: This invention relates to a optical receiver circuit (200) comprising: at least one photo detector (207) configured to convert a received light signal to an input current signal, a transimpedance amplifier circuit (201) with an input to receive the input current signal from the at least one photo detector (207) and being configured to convert the received input current signal to an output voltage signal to generate an output signal of the transimpedance amplifier circuit (201), wherein the transimpedance amplifier circuit comprises a plurality of gain amplifier stages (209, 210, 211), a DC restoration component (205), wherein the DC restoration component (205) is configured to receive the output voltage signal of the transimpedance amplifier circuit (201) for restoring the DC component of the received current signal and configured for outputting a corresponding current signal, and an automatic gain control component (204) configured for controlling via at least one programmable feedback resistor (226, 227) the equivalent transimpedance of the transimpedance amplifier circuit based on the signal output by the DC restoration component (205) to provide a constant output voltage amplitude for different current ranges of the input current signal.
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