Method of manufacturing a semiconductor component that includes self-aligning a gate electrode to a field plate
    1.
    发明授权
    Method of manufacturing a semiconductor component that includes self-aligning a gate electrode to a field plate 失效
    制造半导体部件的方法,其包括将栅电极自对准到场板

    公开(公告)号:US06939781B2

    公开(公告)日:2005-09-06

    申请号:US10609106

    申请日:2003-06-27

    摘要: In one embodiment of the invention, a semiconductor component includes a semiconductor substrate (110), a first dielectric layer (120) above the semiconductor substrate, a first ohmic contact region (410) and a second ohmic contact region (420) above the semiconductor substrate, a gate electrode (1120) above the semiconductor substrate and between the first ohmic contact region and the second ohmic contact region, a field plate (210) above the first dielectric layer and between the gate electrode and the second ohmic contact region, a second dielectric layer (310) above the field plate, the first dielectric layer, the first ohmic contact region, and the second ohmic contact region, and a third dielectric layer (910) between the gate electrode and the field plate and not located above the gate electrode or the field plate.

    摘要翻译: 在本发明的一个实施例中,半导体部件包括半导体衬底(110),半导体衬底上方的第一介电层(120),半导体上方的第一欧姆接触区(410)和第二欧姆接触区(420) 衬底,半导体衬底之上和第一欧姆接触区域和第二欧姆接触区域之间的栅极电极(1120),在第一介电层上方以及栅电极和第二欧姆接触区域之间的场板(210), 位于场板上方的第二电介质层(310),第一电介质层,第一欧姆接触区域和第二欧姆接触区域,以及栅电极和场板之间的第三介电层(910) 栅电极或场板。

    Recessed semiconductor device
    3.
    发明申请
    Recessed semiconductor device 有权
    嵌入式半导体器件

    公开(公告)号:US20060043416A1

    公开(公告)日:2006-03-02

    申请号:US10925855

    申请日:2004-08-25

    IPC分类号: H01L31/0328

    摘要: A semiconductor structure includes a first semiconductor layer, a second semiconductor layer over the first semiconductor layer, a third semiconductor layer over the second semiconductor layer, and a fourth semiconductor layer over the third semiconductor layer. A first conductive portion is coupled to the first semiconductor layer, and a second conductive portion is formed over the first semiconductor layer.

    摘要翻译: 半导体结构包括第一半导体层,第一半导体层上的第二半导体层,第二半导体层上的第三半导体层以及第三半导体层上的第四半导体层。 第一导电部分耦合到第一半导体层,并且在第一半导体层上形成第二导电部分。

    Method for forming a microwave field effect transistor with high operating voltage
    4.
    发明授权
    Method for forming a microwave field effect transistor with high operating voltage 有权
    用于形成具有高工作电压的微波场效应晶体管的方法

    公开(公告)号:US06867078B1

    公开(公告)日:2005-03-15

    申请号:US10716955

    申请日:2003-11-19

    摘要: A microwave field effect transistor (10) has a high conductivity gate (44) overlying a double heterojunction structure (14, 18, 22) that has an undoped channel layer (18). The heterojunction structure overlies a substrate (12). A recess layer that is a not intentionally doped (NID) layer (24) overlies the heterojunction structure and is formed with a predetermined thickness that minimizes impact ionization effects at an interface of a drain contact of source/drain ohmic contacts (30) and permits significantly higher voltage operation than previous step gate transistors. Another recess layer (26) is used to define a gate dimension. A Schottky gate opening (42) is formed within a step gate opening (40) to create a step gate structure. A channel layer (18) material of InxGa1−xAs is used to provide a region of electron confinement with improved transport characteristics that result in higher frequency of operation, higher power density and improved power-added efficiency.

    摘要翻译: 微波场效应晶体管(10)具有覆盖具有未掺杂沟道层(18)的双异质结结构(14,18,22)的高导电性栅极(44)。 异质结结构覆盖在基板(12)上。 作为非有意掺杂(NID)层(24)的凹陷层覆盖在异质结结构上并形成预定的厚度,使得在源极/漏极欧姆接触(30)的漏极接触的界面处的冲击电离效应最小化并允许 比上一级栅晶体管显着更高的电压操作。 另一个凹陷层(26)用于限定门尺寸。 肖特基门开口(42)形成在步进门开口(40)内以形成阶梯门结构。 使用In x Ga 1-x As的沟道层(18)材料来提供具有改善的传输特性的电子约束区域,这导致更高的操作频率,更高的功率密度和更好的功率附加效率。

    Bidirectional lateral insulated gate bipolar transistor having increased
voltage blocking capability
    5.
    发明授权
    Bidirectional lateral insulated gate bipolar transistor having increased voltage blocking capability 失效
    具有增加的电压阻断能力的双向横向绝缘栅双极晶体管

    公开(公告)号:US5977569A

    公开(公告)日:1999-11-02

    申请号:US924106

    申请日:1997-09-05

    申请人: Hsin-Hua P. Li

    发明人: Hsin-Hua P. Li

    摘要: A bidirectional lateral insulated gate bipolar transistor (IGBT) includes two gate electrodes. The IGBT can conduct current in two directions. The IGBT relies on a double RESURF structure to provide high voltage blocking in both directions. The IGBT is symmetrical, having an N-type drift region in contact with an oxide layer. A P-type region is provided above the N-type drift region, having a portion more heavily doped with P-type dopants. The double RESURF structure can be provided by a buried oxide layer, a floating doped region, or a horizontal PN junction. The IGBT can be utilized in various power operations, including a matrix switch or a voltage source converter.

    摘要翻译: 双向横向绝缘栅双极晶体管(IGBT)包括两个栅电极。 IGBT可以在两个方向上导通电流。 IGBT依靠双RESURF结构在两个方向提供高电压阻抗。 IGBT是对称的,具有与氧化物层接触的N型漂移区。 P型区域设置在N型漂移区的上方,具有由P型掺杂剂掺杂的部分。 双重RESURF结构可以由掩埋氧化物层,浮置掺杂区域或水平PN结提供。 IGBT可用于各种电源操作,包括矩阵开关或电压源转换器。