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21 条记录 (耗时 0.016 秒)

    Diffusion region routing for narrow scribe-line devices
    1.
    发明授权
    Diffusion region routing for narrow scribe-line devices 有权
    窄划线设备的扩散区域路由

    公开(公告)号：US08669641B2

    公开(公告)日：2014-03-11

    申请号：US13164523

    申请日：2011-06-20

    申请人： Ming-Chang Hsieh ,  Hung-Lin Chen ,  Hsiu-Mei Yu ,  Chin Kun Lan ,  Dong-Lung Lee

    发明人： Ming-Chang Hsieh ,  Hung-Lin Chen ,  Hsiu-Mei Yu ,  Chin Kun Lan ,  Dong-Lung Lee

    IPC分类号： H01L21/78

    CPC分类号： H01L23/585 ,  H01L21/78 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The present disclosure provides a method of making an integrated circuit (IC) device. The method includes forming a first IC feature and a second IC feature in a semiconductor substrate, the first and second IC features being spaced from each other and separated by a scribe region; forming, in the semiconductor substrate, a doped routing feature at least partially within the scribe region and configured to connect the first and second IC features; forming a multilayer interconnect (MLI) structure and an interlayer dielectric (ILD) on the semiconductor substrate, wherein the MLI is configured to be absent within the scribe region; and etching the ILD and the semiconductor substrate within the scribe region to form a scribe-line trench.

    摘要翻译： 本公开提供了一种制造集成电路（IC）装置的方法。 该方法包括在半导体衬底中形成第一IC特征和第二IC特征，第一和第二IC特征彼此间隔开并由划线区分开; 在所述半导体衬底中至少部分地在所述划线区域内形成掺杂的布线特征并且被配置为连接所述第一和第二IC特征; 在所述半导体衬底上形成多层互连（MLI）结构和层间电介质（ILD），其中所述MLI被配置为在所述划线区域内不存在; 并且在刻划区域内蚀刻ILD和半导体衬底以形成划线沟槽。

    FAST FOURIER TRANSFORM PROCESSOR
    2.
    发明申请
    FAST FOURIER TRANSFORM PROCESSOR 审中-公开
    快速傅立叶变换处理器

    公开(公告)号：US20100169402A1

    公开(公告)日：2010-07-01

    申请号：US12400794

    申请日：2009-03-10

    申请人： Hung-Lin Chen ,  Yu-Min Lin ,  Dar-Zu Hsu ,  Yuan Chen ,  Chen-Yi Lee

    发明人： Hung-Lin Chen ,  Yu-Min Lin ,  Dar-Zu Hsu ,  Yuan Chen ,  Chen-Yi Lee

    IPC分类号： G06F17/14

    CPC分类号： G06F17/142

    摘要： An FFT processor is disclosed, which includes a first multi-pipelined MDC unit, a second multi-pipelined MDC unit and a switching network. The first multi-pipelined MDC unit and the second multi-pipelined MDC unit respectively employ a plurality of MDC circuits to change the positions of the delayers thereof in parallel way. By changing the operation time sequence of the signals in the first multi-pipelined MDC unit and the second multi-pipelined MDC unit, the first multi-pipelined MDC unit is able to directly send the operation results to the second multi-pipelined MDC unit through the switching network.

    摘要翻译： 公开了一种FFT处理器，其包括第一多流水线MDC单元，第二多流水线MDC单元和交换网络。 第一多流水线MDC单元和第二多流水线MDC单元分别采用多个MDC电路以并行方式改变其延迟器的位置。 通过改变第一多流水线MDC单元和第二多流水线MDC单元中的信号的操作时间顺序，第一多流水线MDC单元能够直接将操作结果发送到第二多流水线MDC单元 交换网络。

    DIFFUSION REGION ROUTING FOR NARROW SCRIBE-LINE DEVICES
    3.
    发明申请
    DIFFUSION REGION ROUTING FOR NARROW SCRIBE-LINE DEVICES 有权
    用于NARROW SCRIBE-LINE设备的扩展区域路由

    公开(公告)号：US20100013059A1

    公开(公告)日：2010-01-21

    申请号：US12173121

    申请日：2008-07-15

    申请人： Ming-Chang Hsieh ,  Hung-Lin Chen ,  Hsiu-Mei Yu ,  Chin Kun Lan ,  Dong-Lung Lee

    发明人： Ming-Chang Hsieh ,  Hung-Lin Chen ,  Hsiu-Mei Yu ,  Chin Kun Lan ,  Dong-Lung Lee

    IPC分类号： H01L21/302 ,  H01L23/544

    CPC分类号： H01L23/585 ,  H01L21/78 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The present disclosure provides a method of making an integrated circuit (IC) device. The method includes forming a first IC feature and a second IC feature in a semiconductor substrate, the first and second IC features being spaced from each other and separated by a scribe region; forming, in the semiconductor substrate, a doped routing feature at least partially within the scribe region and configured to connect the first and second IC features; forming a multilayer interconnect (MLI) structure and an interlayer dielectric (ILD) on the semiconductor substrate, wherein the MLI is configured to be absent within the scribe region; and etching the ILD and the semiconductor substrate within the scribe region to form a scribe-line trench.

    摘要翻译： 本公开提供了一种制造集成电路（IC）装置的方法。 该方法包括在半导体衬底中形成第一IC特征和第二IC特征，第一和第二IC特征彼此间隔开并由划线区分开; 在所述半导体衬底中至少部分地在所述划线区域内形成掺杂的布线特征并且被配置为连接所述第一和第二IC特征; 在所述半导体衬底上形成多层互连（MLI）结构和层间电介质（ILD），其中所述MLI被配置为在所述划线区域内不存在; 并且在刻划区域内蚀刻ILD和半导体衬底以形成划线沟槽。

    Method of manufacturing double diffused drains in semiconductor devices
    4.
    发明申请
    Method of manufacturing double diffused drains in semiconductor devices 有权
    在半导体器件中制造双扩散漏极的方法

    公开(公告)号：US20080132024A1

    公开(公告)日：2008-06-05

    申请号：US11607675

    申请日：2006-11-30

    申请人： Hung-Lin Chen ,  Shao-Yen Ku

    发明人： Hung-Lin Chen ,  Shao-Yen Ku

    IPC分类号： H01L21/336

    CPC分类号： H01L29/66575 ,  H01L21/2652 ,  H01L21/266 ,  H01L21/823418 ,  H01L21/823462 ,  H01L29/7833

    摘要： A method of manufacturing double diffused drains in a semiconductor device. An embodiment comprises forming a gate dielectric layer on a substrate, and masking and patterning the gate dielectric layer. Once the gate dielectric layer has been patterned, a second dielectric layer, having a different depth than the gate dielectric layer, is deposited into the pattern. Once the dielectric layers have been placed into a step form, DDDs are formed by implanting ions through the two dielectric layers, whose different filtering properties form the DDDS. In another embodiment the implantations through the two dielectric layers are performed using different energies to form the different dose regions. In yet another embodiment the implantations are performed using different species (light and heavy), instead of different energies, to form the different dose regions.

    摘要翻译： 一种在半导体器件中制造双扩散漏极的方法。 一个实施例包括在衬底上形成栅极电介质层，并掩蔽和图案化栅极电介质层。 一旦对栅介质层进行了图案化，则将具有与栅极电介质层不同的深度的第二介电层沉积到图案中。 一旦电介质层已经被放置成台阶形式，通过将离子注入穿过两个不同的过滤特性形成DDDS的介电层形成DDD。 在另一个实施例中，通过两个介电层的注入是使用不同的能量来进行的，以形成不同的剂量区域。 在另一个实施方案中，使用不同种类（轻和重）代替不同的能量来进行植入以形成不同的剂量区域。

    ELECTROSTATIC DISCHARGE PROTECTION DEVICE
    5.
    发明申请
    ELECTROSTATIC DISCHARGE PROTECTION DEVICE 有权
    静电放电保护装置

    公开(公告)号：US20080023766A1

    公开(公告)日：2008-01-31

    申请号：US11459650

    申请日：2006-07-25

    申请人： Feng-Chi Hung ,  Jian-Hsing Lee ,  Hung-Lin Chen ,  Deng-Shun Chang

    发明人： Feng-Chi Hung ,  Jian-Hsing Lee ,  Hung-Lin Chen ,  Deng-Shun Chang

    IPC分类号： H01L23/62

    CPC分类号： H01L29/0847 ,  H01L29/0692 ,  H01L29/7835

    摘要： An electrostatic discharge protection device comprising a multi-finger gate, a first lightly doped region of a second conductivity, a first heavily doped region of the second conductivity, and a second lightly doped region of the second conductivity. The multi-finger gate comprises a plurality of fingers mutually connected in parallel over an active region of a first conductivity. The first lightly doped region of a second conductivity is disposed in the semiconductor substrate and between two of the fingers. The first heavily doped region of the second conductivity is disposed in the first lightly doped region of the second conductivity. The second lightly doped region of the second conductivity is beneath and adjoins the first lightly doped region of the second conductivity.

    摘要翻译： 一种静电放电保护装置，包括多指门，具有第二导电性的第一轻掺杂区，第二导电性的第一重掺杂区和第二导电性的第二轻掺杂区。 多指门包括在第一导电性的有源区域上并联连接的多个指状物。 第二导电性的第一轻掺杂区域设置在半导体衬底中并且在两个指状物之间。 第二导电性的第一重掺杂区域设置在第二导电性的第一轻掺杂区域中。 第二导电性的第二轻掺杂区域位于第二导电性的第一轻掺杂区域的下方并与其邻接。

    Liquid fuel
    8.
    发明授权
    Liquid fuel 有权

    公开(公告)号：US11299683B2

    公开(公告)日：2022-04-12

    申请号：US17253478

    申请日：2017-09-25

    申请人： Shu-min Chen ,  Hung-lin Chen

    发明人： Hunglin Chen ,  Shumin Chen

    IPC分类号： C10L1/04

    摘要： A liquid fuel obtained by blending heavy oil by selectively introducing hydrocarbon substances. The liquid fuel consists of a light oil component consisting of C6-C12 alkane, a catalytic component consisting of C13-C16 alkane, and a heavy oil component. On the basis of the liquid fuel, the mass fraction of the heavy oil component is 10%-90%, the mass fraction of the light oil component is 0-49%, and the mass of the catalytic component accounts for 86% or more of the mass of the light oil component; and the liquid fuel may also contain an aromatic hydrocarbon having a mass fraction of 0-15%. The obtained liquid fuel has good driving performance, combustion performance and safety, and can be applied to a diesel engine system, a diesel/heavy oil combustion system, etc., as a mixed fuel oil.

    LIQUID FUEL
    9.
    发明申请
    LIQUID FUEL 有权

    公开(公告)号：US20210163836A1

    公开(公告)日：2021-06-03

    申请号：US17253478

    申请日：2017-09-25

    申请人： Shu-min CHEN ,  Hung-lin CHEN

    发明人： Hunglin CHEN ,  Shumin CHEN

    IPC分类号： C10L1/04

    摘要： A liquid fuel obtained by blending heavy oil by selectively introducing hydrocarbon substances. The liquid fuel consists of a light oil component consisting of C6-C12 alkane, a catalytic component consisting of C13-C16 alkane, and a heavy oil component. On the basis of the liquid fuel, the mass fraction of the heavy oil component is 10%-90%, the mass fraction of the light oil component is 0-49%, and the mass of the catalytic component accounts for 86% or more of the mass of the light oil component; and the liquid fuel may also contain an aromatic hydrocarbon having a mass fraction of 0-15%. The obtained liquid fuel has good driving performance, combustion performance and safety, and can be applied to a diesel engine system, a diesel/heavy oil combustion system, etc., as a mixed fuel oil.

    DIFFUSION REGION ROUTING FOR NARROW SCRIBE-LINE DEVICES
    10.
    发明申请
    DIFFUSION REGION ROUTING FOR NARROW SCRIBE-LINE DEVICES 有权
    用于NARROW SCRIBE-LINE设备的扩展区域路由

    公开(公告)号：US20110241179A1

    公开(公告)日：2011-10-06

    申请号：US13164523

    申请日：2011-06-20

    申请人： Ming-Chang Hsieh ,  Hung-Lin Chen ,  Hsiu-Mei Yu ,  Chin Kun Lan ,  Dong-Lung Lee

    发明人： Ming-Chang Hsieh ,  Hung-Lin Chen ,  Hsiu-Mei Yu ,  Chin Kun Lan ,  Dong-Lung Lee

    IPC分类号： H01L23/544

    CPC分类号： H01L23/585 ,  H01L21/78 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The present disclosure provides a method of making an integrated circuit (IC) device. The method includes forming a first IC feature and a second IC feature in a semiconductor substrate, the first and second IC features being spaced from each other and separated by a scribe region; forming, in the semiconductor substrate, a doped routing feature at least partially within the scribe region and configured to connect the first and second IC features; forming a multilayer interconnect (MLI) structure and an interlayer dielectric (ILD) on the semiconductor substrate, wherein the MLI is configured to be absent within the scribe region; and etching the ILD and the semiconductor substrate within the scribe region to form a scribe-line trench.

    摘要翻译： 本公开提供了一种制造集成电路（IC）装置的方法。 该方法包括在半导体衬底中形成第一IC特征和第二IC特征，第一和第二IC特征彼此间隔开并由划线区分开; 在所述半导体衬底中至少部分地在所述划线区域内形成掺杂的布线特征并且被配置为连接所述第一和第二IC特征; 在所述半导体衬底上形成多层互连（MLI）结构和层间电介质（ILD），其中所述MLI被配置为在所述划线区域内不存在; 并且在刻划区域内蚀刻ILD和半导体衬底以形成划线沟槽。