Method of manufacturing double diffused drains in semiconductor devices
    1.
    发明申请
    Method of manufacturing double diffused drains in semiconductor devices 有权
    在半导体器件中制造双扩散漏极的方法

    公开(公告)号:US20080132024A1

    公开(公告)日:2008-06-05

    申请号:US11607675

    申请日:2006-11-30

    IPC分类号: H01L21/336

    摘要: A method of manufacturing double diffused drains in a semiconductor device. An embodiment comprises forming a gate dielectric layer on a substrate, and masking and patterning the gate dielectric layer. Once the gate dielectric layer has been patterned, a second dielectric layer, having a different depth than the gate dielectric layer, is deposited into the pattern. Once the dielectric layers have been placed into a step form, DDDs are formed by implanting ions through the two dielectric layers, whose different filtering properties form the DDDS. In another embodiment the implantations through the two dielectric layers are performed using different energies to form the different dose regions. In yet another embodiment the implantations are performed using different species (light and heavy), instead of different energies, to form the different dose regions.

    摘要翻译: 一种在半导体器件中制造双扩散漏极的方法。 一个实施例包括在衬底上形成栅极电介质层,并掩蔽和图案化栅极电介质层。 一旦对栅介质层进行了图案化,则将具有与栅极电介质层不同的深度的第二介电层沉积到图案中。 一旦电介质层已经被放置成台阶形式,通过将离子注入穿过两个不同的过滤特性形成DDDS的介电层形成DDD。 在另一个实施例中,通过两个介电层的注入是使用不同的能量来进行的,以形成不同的剂量区域。 在另一个实施方案中,使用不同种类(轻和重)代替不同的能量来进行植入以形成不同的剂量区域。

    Method of manufacturing double diffused drains in semiconductor devices
    2.
    发明授权
    Method of manufacturing double diffused drains in semiconductor devices 有权
    在半导体器件中制造双扩散漏极的方法

    公开(公告)号:US07585737B2

    公开(公告)日:2009-09-08

    申请号:US11607675

    申请日:2006-11-30

    IPC分类号: H01L21/336

    摘要: A method of manufacturing double diffused drains in a semiconductor device. An embodiment comprises forming a gate dielectric layer on a substrate, and masking and patterning the gate dielectric layer. Once the gate dielectric layer has been patterned, a second dielectric layer, having a different depth than the gate dielectric layer, is deposited into the pattern. Once the dielectric layers have been placed into a step form, DDDs are formed by implanting ions through the two dielectric layers, whose different filtering properties form the DDDS. In another embodiment the implantations through the two dielectric layers are performed using different energies to form the different dose regions. In yet another embodiment the implantations are performed using different species (light and heavy), instead of different energies, to form the different dose regions.

    摘要翻译: 一种在半导体器件中制造双扩散漏极的方法。 一个实施例包括在衬底上形成栅极电介质层,并掩蔽和图案化栅极电介质层。 一旦对栅介质层进行了图案化,则将具有与栅极电介质层不同的深度的第二介电层沉积到图案中。 一旦电介质层已经被放置成台阶形式,通过将离子注入穿过两个不同的过滤特性形成DDDS的介电层形成DDD。 在另一个实施例中,通过两个介电层的注入是使用不同的能量来进行的,以形成不同的剂量区域。 在另一个实施方案中,使用不同种类(轻和重)代替不同的能量来进行植入以形成不同的剂量区域。

    Apparatus and methods for movable megasonic wafer probe
    3.
    发明授权
    Apparatus and methods for movable megasonic wafer probe 有权
    移动式超声波晶片探头的装置和方法

    公开(公告)号:US08926762B2

    公开(公告)日:2015-01-06

    申请号:US13226216

    申请日:2011-09-06

    IPC分类号: B08B3/04 B08B3/12

    摘要: Methods and apparatus for a movable megasonic wafer probe. A method is disclosed including positioning a movable probe on a wafer surface, the movable probe having an open bottom portion that exposes a portion of the wafer surface; applying a liquid onto the wafer surface through a bottom portion of the movable probe; and moving the movable probe at a predetermined scan speed to traverse the wafer surface, applying the liquid to the wafer surface while moving over the wafer surface. In additional embodiments the method includes providing a transducer for applying megasonic energy to the wafer surface. Apparatus embodiments are disclosed including the movable megasonic wafer probe.

    摘要翻译: 移动式超声波晶片探针的方法和装置。 公开了一种方法,包括将可移动探针定位在晶片表面上,所述可移动探针具有暴露晶片表面的一部分的开放底部; 通过可移动探针的底部将液体施加到晶片表面上; 并且以预定的扫描速度移动可移动探针以穿过晶片表面,同时在晶片表面上移动时将液体施加到晶片表面。 在另外的实施例中,该方法包括提供用于将兆声波能量施加到晶片表面的换能器。 公开了包括可移动兆声晶片探针的装置实施例。

    METHOD OF FABRICATING HIGH-K METAL GATE DEVICES
    6.
    发明申请
    METHOD OF FABRICATING HIGH-K METAL GATE DEVICES 有权
    制造高K金属栅极器件的方法

    公开(公告)号:US20100178772A1

    公开(公告)日:2010-07-15

    申请号:US12354394

    申请日:2009-01-15

    IPC分类号: H01L21/306

    摘要: The present disclosure provides a method for fabricating a semiconductor device. The method includes providing a semiconductor substrate having a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a first metal layer and a first silicon layer by an in-situ deposition process, patterning the first silicon layer to remove a portion overlying the second region, patterning the first metal layer using the patterned first silicon layer as a mask, and removing the patterned first silicon layer including applying a solution. The solution includes a first component having an [F—] concentration greater than 0.01 M, a second component configured to adjust a pH of the solution from about 4.3 to about 6.7, and a third component configured to adjust a potential of the solution to be greater than −1.4 volts.

    摘要翻译: 本公开提供了一种用于制造半导体器件的方法。 该方法包括提供具有第一区域和第二区域的半导体衬底,在半导体衬底上形成高k电介质层,通过原位沉积工艺形成第一金属层和第一硅层,图案化第一硅 以去除覆盖在第二区域上的部分,使用图案化的第一硅层作为掩模来图案化第一金属层,以及去除图案化的第一硅层,包括施加溶液。 该溶液包括具有大于0.01M的[F-]浓度的第一组分,被配置为将溶液的pH调节至约4.3至约6.7的第二组分,以及将溶液的电位调节为 大于-1.4伏。

    Using implantation method to control gate oxide thickness on dual oxide semiconductor devices
    7.
    发明授权
    Using implantation method to control gate oxide thickness on dual oxide semiconductor devices 有权
    使用注入方法来控制双氧化物半导体器件上的栅极氧化物厚度

    公开(公告)号:US06455405B1

    公开(公告)日:2002-09-24

    申请号:US10055093

    申请日:2002-01-23

    申请人: Shao-Yen Ku

    发明人: Shao-Yen Ku

    IPC分类号: H01L213205

    摘要: A method for forming dual thickness gate oxide layers comprising the following steps. A structure having at least a first area and a second area is provided. The second area of the structure is masked. Ion implanting Si4+ or Ge4+ ions into the unmasked first area of the structure to form an amorphous layer within the first area of the structure. The second area of the structure is unmasked. The first and second areas of the structure are oxidized to form: a first gate oxide layer upon the structure within the first area; and a second gate oxide layer upon the structure within the second area. The first gate oxide layer having a greater thickness than the second gate oxide layer, completing formation of the dual thickness gate oxide layers.

    摘要翻译: 一种形成双厚度栅极氧化物层的方法,包括以下步骤。 提供具有至少第一区域和第二区域的结构。 结构的第二个区域被掩盖。 离子将Si4 +或Ge4 +离子注入到结构的未掩蔽的第一区域中,以在结构的第一区域内形成非晶层。 结构的第二个区域被揭开。 该结构的第一和第二区域被氧化以形成:在第一区域内的结构上的第一栅极氧化物层; 以及在第二区域内的结构上的第二栅极氧化物层。 第一栅极氧化物层具有比第二栅极氧化物层更大的厚度,完成双厚度栅极氧化物层的形成。

    Apparatus and Methods for Movable Megasonic Wafer Probe
    10.
    发明申请
    Apparatus and Methods for Movable Megasonic Wafer Probe 有权
    移动式超声波晶圆探头的装置和方法

    公开(公告)号:US20130056031A1

    公开(公告)日:2013-03-07

    申请号:US13226216

    申请日:2011-09-06

    IPC分类号: B08B7/04

    摘要: Methods and apparatus for a movable megasonic wafer probe. A method is disclosed including positioning a movable probe on a wafer surface, the movable probe having an open bottom portion that exposes a portion of the wafer surface; applying a liquid onto the wafer surface through a bottom portion of the movable probe; and moving the movable probe at a predetermined scan speed to traverse the wafer surface, applying the liquid to the wafer surface while moving over the wafer surface. In additional embodiments the method includes providing a transducer for applying megasonic energy to the wafer surface. Apparatus embodiments are disclosed including the movable megasonic wafer probe.

    摘要翻译: 移动式超声波晶片探针的方法和装置。 公开了一种方法,包括将可移动探针定位在晶片表面上,所述可移动探针具有暴露晶片表面的一部分的开放底部; 通过可移动探针的底部将液体施加到晶片表面上; 并且以预定的扫描速度移动可移动探针以穿过晶片表面,同时在晶片表面上移动时将液体施加到晶片表面。 在另外的实施例中,该方法包括提供用于将兆声波能量施加到晶片表面的换能器。 公开了包括可移动兆声晶片探针的装置实施例。