公开(公告)号：US20080160177A1

公开(公告)日：2008-07-03

申请号：US11618528

申请日：2006-12-29

Applicant: J. C. Mataybas ,  Lakshmi Supriya ,  Omar Bchir

Inventor： J. C. Mataybas ,  Lakshmi Supriya ,  Omar Bchir

IPC: B05D5/12

CPC classification number: H05K3/182 ,  C23C18/1608 ,  C23C18/1651 ,  C23C18/1653 ,  C23C18/30 ,  C23C18/31 ,  C23C18/38 ,  C23C18/52 ,  H05K3/046 ,  H05K3/4661 ,  H05K2203/0108 ,  H05K2203/0522

Abstract: Methods for forming traces/lines and interconnects on substrates and devices and systems thereof of herein disclosed. In some embodiments, an activator layer is deposited on a surface of a substrate. Pick-up lithography using a pre-patterned lithographic stamp, ultraviolet lithography or like methods are used to selectively remove portions of the activator layer to form a pattern on the surface of the substrate. Electroless metal deposition is then applied to the surface of the substrate to form a metal pattern selectively on the remaining activator layer. Electroless plating can then be used to form traces/lines and interconnects in dimensions of less than 10 micrometers.

Abstract translation: 用于在本文公开的衬底及其器件及其系统上形成迹线/线和互连的方法。 在一些实施例中，激活剂层沉积在基底的表面上。 使用预先图案化的平版印刷，紫外光刻或类似方法的拾取光刻用于选择性地去除激活剂层的部分以在基底的表面上形成图案。 然后将无电金属沉积施加到衬底的表面上以在剩余的激活剂层上选择性地形成金属图案。 然后可以使用化学镀来形成尺寸小于10微米的迹线/线和互连。