Low profile optically-sensitive semiconductor package
    1.
    发明授权
    Low profile optically-sensitive semiconductor package 有权
    薄型光敏半导体封装

    公开(公告)号:US06683386B2

    公开(公告)日:2004-01-27

    申请号:US09837804

    申请日:2001-04-18

    申请人: Jinchuan Bai

    发明人: Jinchuan Bai

    IPC分类号: H01L2329

    摘要: A low-profile optically-sensitive semiconductor device is disclosed which includes a substrate with an opening. A cover plate is bonded to a first surface of the substrate in such a manner that a optically-sensitive semiconductor chip is adhered thereto via the opening of the substrate. Right after the semiconductor chip is electrically coupled to the substrate, a first encapsulant with a through hole connected with the opening of the substrate, is formed on the second surface of the substrate. A sealing plate is then attached to the first encapsulant to seal the through hole, so as to hermetically separate the semiconductor chip from the atmosphere. On the first surface of the substrate, a second encapsulant is formed such that ends of the conductive elements and an outer surface of the cover plate are exposed to and flush with a top surface of the second encapsulant.

    摘要翻译: 公开了一种低轮廓的光敏半导体器件,其包括具有开口的衬底。 盖板以这样的方式结合到基板的第一表面,使得光敏半导体芯片经由基板的开口粘附到基板上。 在半导体芯片电连接到基板之后,在基板的第二表面上形成具有与基板的开口连接的通孔的第一密封剂。 然后将密封板附接到第一密封剂以密封通孔,从而将半导体芯片与大气隔离。 在基板的第一表面上,形成第二密封剂,使得导电元件的端部和盖板的外表面暴露于第二密封剂的顶表面并与其平齐。

    Low profile semiconductor package and process for making the same
    2.
    发明授权
    Low profile semiconductor package and process for making the same 有权
    低调的半导体封装和制造相同的工艺

    公开(公告)号:US06326700B1

    公开(公告)日:2001-12-04

    申请号:US09639202

    申请日:2000-08-15

    IPC分类号: H01L2329

    摘要: A low-profile semiconductor device is disclosed which includes a substrate having a base layer formed with at least a hole and a plurality of conductive traces arranged on the base layer. A semiconductor die is attached to the base layer of the substrate opposite to the conductive traces and electrically connected to the conductive traces by a plurality of first conductive elements passing through the hole of the base layer. A plurality of second conductive elements are arrayedly connected to the terminal of each of the conductive traces for providing externally electrical connection to the semiconductor die. The semiconductor die is encapsulated by a first encapsulant formed on the surface of the substrate on which the semiconductor die is mounted. A second encapsulant is formed on the surface of the substrate on which the conductive traces are arranged to completely encapsulate the conductive traces, first conductive elements and the hole. Meanwhile, the second encapsulant is formed to encapsulate the second conductive elements in such a manner that the bottom ends of the second conductive elements are exposed to and flush with the bottom surface of the second encapsulant.

    摘要翻译: 公开了一种低轮廓半导体器件,其包括具有至少形成有孔的基底层和布置在基底层上的多个导电迹线的基板。 半导体管芯附着到与导电迹线相对的基板的基底层,并且通过穿过基底层的孔的多个第一导电元件电连接到导电迹线。 多个第二导电元件阵列地连接到每个导电迹线的端子,以提供与半导体管芯的外部电连接。 半导体管芯由形成在其上安装半导体管芯的衬底的表面上的第一密封剂封装。 第二密封剂形成在衬底的表面上,导电迹线布置在其上以完全封装导电迹线,第一导电元件和孔。 同时,形成第二密封剂以使第二导电元件的底端暴露于第二密封剂的底表面并与其平齐的方式封装第二导电元件。