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1.发明授权Method of controlling a PFC stage operating in boundary conduction mode, a PFC stage, and an SMPS 有权控制在边界导通模式下工作的PFC级，PFC级和SMPS的方法公开(公告)号：US08599579B2
公开(公告)日：2013-12-03
申请号：US12957121
申请日：2010-11-30
CPC classification number: H02M1/4208 , H02M1/12 , Y02B70/126
Abstract: Consistent with an example embodiment, there is a control method which reduces the steps: instead of a constant on-time for the switch, the duration of the on-time is increased each time an additional valley to be skipped. The predetermined increase may be either a fixed fractional increase or a further additional increment; it may be determined by a small regulation loop that multiplies the on-time from the main loop with a factor equal to the ratio between measured period time and the sum of primary and secondary stroke times.
Abstract translation: 与示例性实施例一致，存在一种减少以下步骤的控制方法：代替开关的导通时间不变，导通时间的持续时间每次要被跳过的额外谷值增加。 预定增加可以是固定的分数增加或另外的附加增量; 可以通过小的调节回路来确定将主回路的导通时间与等于测量的周期时间与初级和次级行程时间的总和之间的比率的系数相乘的因子。
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2.发明申请METHOD OF CONTROLLING A PFC STAGE OPERATING IN BOUNDARY CONDUCTION MODE, A PFC STAGE, AND AN SMPS 有权控制PFC边界运行模式的PFC级，PFC级和SMPS的方法公开(公告)号：US20120008350A1
公开(公告)日：2012-01-12
申请号：US12957121
申请日：2010-11-30
IPC: H02M7/219
CPC classification number: H02M1/4208 , H02M1/12 , Y02B70/126
Abstract: For many applications an SMPS is designed to operate in boundary conduction mode. As the load decreases the switching frequency increases, and so the concept of valley skipping may be used in which the switching frequency is clamped, by delaying to turn on the time of the active switch, for an integral number of cycles of a resonant circuit in the SMPS. With further reduction of the load, additional valleys may be skipped. However, each change in the number of valleys skipped results in a step in the input current that is drawn, distorting the ideal mains sine wave, thereby increasing unwanted harmonics.Consistent with an example embodiment, there is a control method which reduces the steps: instead of a constant on-time for the switch, the duration of the on-time is increased each time an additional valley to be skipped. The predetermined increase may be either a fixed fractional increase or a further additional increment; it may be determined by a small regulation loop that multiplies the on-time from the main loop with a factor equal to the ratio between measured period time and the sum of primary and secondary stroke times.
Abstract translation: 对于许多应用，SMPS被设计为在边界传导模式下工作。 随着负载减小，开关频率增加，因此可以使用谷跳越的概念，其中开关频率被钳位，通过延迟有源开关的时间来导通谐振电路的整数个周期 SMPS。 随着负载的进一步减少，可能会跳过额外的谷。 然而，跳过的谷数的每个变化导致所绘制的输入电流的步长，使理想的主电源正弦波失真，从而增加不需要的谐波。 与示例性实施例一致，存在一种减少以下步骤的控制方法：代替开关的导通时间不变，导通时间的持续时间每次要被跳过的额外谷值增加。 预定增加可以是固定的分数增加或另外的附加增量; 可以通过小的调节回路来确定将主回路的导通时间与等于测量的周期时间与初级和次级行程时间的总和之间的比率的系数相乘的因子。
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公开(公告)号：US20110188273A1
公开(公告)日：2011-08-04
申请号：US12981128
申请日：2010-12-29
Applicant: Frans PANSIER , Thomas Antonius DUERBAUM , Markus SCHMID , Klaus Mühlbauer , Johann Baptist Daniel KUEBRICH
Inventor： Frans PANSIER , Thomas Antonius DUERBAUM , Markus SCHMID , Klaus Mühlbauer , Johann Baptist Daniel KUEBRICH
CPC classification number: H02M3/1584 , H02M1/4225 , Y02B70/126
Abstract: A power factor correction stage comprising: an input terminal configured to receive an input signal; an output terminal configured to provide an output signal; a first converter stage and one or more further converter stages, wherein each of the converter stages is connected to the input terminal and the output terminal, and each converter stage comprises a switch; and a controller configured to operate the switches of the converter stages. The controller is configured to operate the switch of the one or more further converter stages at a period of time after operation of the switch of the first converter stage for a current switching cycle, wherein the period of time corresponds to a proportion of the switching frequency for an earlier switching cycle that does not correspond to substantially the period of the earlier switching cycle divided by the number of converter stages.
Abstract translation: 一种功率因数校正级，包括：输入端，被配置为接收输入信号; 输出端子，被配置为提供输出信号; 第一转换器级和一个或多个其它转换器级，其中每个转换器级连接到输入端子和输出端子，并且每个转换器级包括开关; 以及控制器，被配置为操作所述转换器级的开关。 控制器被配置为在当前开关周期的第一转换器级的开关操作之后的一段时间内操作一个或多个其它转换器级的开关，其中该时间段对应于开关频率的比例 对于较早的开关周期，其基本上不对应于较早开关周期的周期除以转换器级的数量。
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公开(公告)号：US09007730B2
公开(公告)日：2015-04-14
申请号：US12980554
申请日：2010-12-29
Applicant: Markus Schmid , Johann Baptist Daniel Kuebrich , Thomas Antonius Duerbaum , Gian Hoogzaad , Peter Laro , Frans Pansier
Inventor： Markus Schmid , Johann Baptist Daniel Kuebrich , Thomas Antonius Duerbaum , Gian Hoogzaad , Peter Laro , Frans Pansier
CPC classification number: H02M1/4208 , Y02B70/126
Abstract: A surge protection circuit for a circuit having a rectification module. The surge protection circuit includes a first diode, a second diode, a capacitor and a discharge device. The anode of the first diode is connected to a first input of the rectification module, and the anode of the second diode is connected to a second input of the rectification module. The cathodes of the first and second diodes are both connected to the first plate of the capacitor. The second plate of the capacitor is connected to the negative output of the rectification module. The capacitor is configured such that it is consistently charged to substantially the peak value of a supply voltage during normal operation between surge events. The discharge device is connected to the first plate of the capacitor and is configured to discharge the capacitor when the voltage across the capacitor is in excess of the peak of the maximum value of the normal supply voltage and not discharge the capacitor when the voltage across the capacitor is not in excess of the peak of the maximum value of the normal supply voltage.
Abstract translation: 一种具有整流模块的电路的浪涌保护电路。 浪涌保护电路包括第一二极管，第二二极管，电容器和放电装置。 第一二极管的阳极连接到整流模块的第一输入端，第二二极管的阳极连接到整流模块的第二输入端。 第一和第二二极管的阴极都连接到电容器的第一板。 电容器的第二板连接到整流模块的负极输出端。 电容器被配置为使得其在浪涌事件之间的正常操作期间一直被充电到基本上电源电压的峰值。 放电装置连接到电容器的第一板，并且当电容器两端的电压超过正常电源电压的最大值的峰值时，对电容器进行放电，并且当跨过电容器的电压 电容器不超过正常电源电压最大值的峰值。
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公开(公告)号：US08692480B2
公开(公告)日：2014-04-08
申请号：US13062176
申请日：2009-09-04
Applicant: Markus Schmid , Thomas Antonius Duerbaum , Gian Hoogzaad , Peter Laro , Johann Baptist Daniel Kuebrich
Inventor： Markus Schmid , Thomas Antonius Duerbaum , Gian Hoogzaad , Peter Laro , Johann Baptist Daniel Kuebrich
CPC classification number: H02J1/14 , H02M2001/007 , H02M2001/008 , Y10T307/406 , Y10T307/469
Abstract: A power supply unit is provided which comprises an AC/DC conversion unit with an input to which an input voltage is coupled and an output to which a DC bus voltage is coupled. The power supply unit furthermore comprises a DC bus capacitor which is coupled to the output of the AC/DC conversion unit. The power supply unit furthermore comprises at least one sub-power supply unit receiving the DC bus voltage as input for providing at least one power supply. The power supply of the at least one sub-power supply unit or part of the load is at least reduced or switched off if the input voltage falls below a predetermined threshold value.
Abstract translation: 提供了一种电源单元，其包括具有与输入电压耦合的输入的AC / DC转换单元和连接有DC总线电压的输出。 电源单元还包括耦合到AC / DC转换单元的输出的DC总线电容器。 电源单元还包括至少一个子电源单元，其接收DC总线电压作为用于提供至少一个电源的输入。 如果输入电压低于预定阈值，则至少一个子电源单元或负载的一部分的电源至少减小或关断。
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Patent Agency Ranking
公开(公告)号：US08614902B2
公开(公告)日：2013-12-24
申请号：US12981128
申请日：2010-12-29
Applicant: Frans Pansier , Thomas Antonius Duerbaum , Markus Schmid , Klaus Mühlbauer , Johann Baptist Daniel Kuebrich
Inventor： Frans Pansier , Thomas Antonius Duerbaum , Markus Schmid , Klaus Mühlbauer , Johann Baptist Daniel Kuebrich
IPC: H02M7/217
CPC classification number: H02M3/1584 , H02M1/4225 , Y02B70/126
Abstract: A power factor correction stage comprising: an input terminal configured to receive an input signal; an output terminal configured to provide an output signal; a first converter stage and one or more further converter stages, wherein each of the converter stages is connected to the input terminal and the output terminal, and each converter stage comprises a switch; and a controller configured to operate the switches of the converter stages. The controller is configured to operate the switch of the one or more further converter stages at a period of time after operation of the switch of the first converter stage for a current switching cycle, wherein the period of time corresponds to a proportion of the switching frequency for an earlier switching cycle that does not correspond to substantially the period of the earlier switching cycle divided by the number of converter stages.
Abstract translation: 一种功率因数校正级，包括：输入端，被配置为接收输入信号; 输出端子，被配置为提供输出信号; 第一转换器级和一个或多个其它转换器级，其中每个转换器级连接到输入端子和输出端子，并且每个转换器级包括开关; 以及控制器，被配置为操作所述转换器级的开关。 控制器被配置为在当前开关周期的第一转换器级的开关操作之后的一段时间内操作一个或多个其它转换器级的开关，其中该时间段对应于开关频率的比例 对于较早的开关周期，其基本上不对应于较早开关周期的周期除以转换器级的数量。
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7.发明授权公开(公告)号：US09263955B2
公开(公告)日：2016-02-16
申请号：US14342724
申请日：2012-09-03
Applicant: Markus Schmid , Johann Baptist Daniel Kuebrich , Thomas Antonius Duerbaum , Hans Halberstadt , Gian Hoogzaad , Frans Pansier
Inventor： Markus Schmid , Johann Baptist Daniel Kuebrich , Thomas Antonius Duerbaum , Hans Halberstadt , Gian Hoogzaad , Frans Pansier
CPC classification number: H02M3/33507 , H02M1/08 , H02M3/33523 , H02M2001/0032 , H02M2001/0035 , H02M2001/0054 , H02M2001/0058 , Y02B70/1491 , Y02B70/16
Abstract: A method is disclosed of controlling a switched mode converter comprising a switch and for providing power to device having a load, comprising: in response to the load exceeding a first threshold, operating in a first mode, being a CCM; in response to the load exceeding a second threshold and not exceeding the first threshold, operating in second mode, being a BCM without valley skipping wherein the switching frequency increases with decreasing load; in response to the load exceeding a third threshold and not exceeding the second threshold, operating in a third mode, being a BCM with valley skipping, wherein the switching frequency depends on the load and the number of valleys skipped and is between a fixed upper and a lower switching frequency limit; and in response to the load not exceeding the third threshold, operating in a fourth mode, being a BCM with valley skipping, wherein the switching frequency depends on at least the load, and is between an upper and a lower switching frequency limit wherein the upper switching frequency limit decreases with decreasing load. A switched mode converter controlled by such a method is also disclosed.
Abstract translation: 公开了一种控制包括开关并用于向具有负载的装置提供电力的开关模式转换器的方法，包括：响应于所述负载超过第一阈值，以第一模式操作，为CCM; 响应于所述负载超过第二阈值且不超过所述第一阈值，在第二模式下操作，所述BCM不具有谷跳跃，其中所述开关频率随负载减小而增加; 响应于超过第三阈值并且不超过第二阈值的负载，以第三模式操作，作为具有谷跳跃的BCM，其中开关频率取决于跳过的负载和谷数，并且在固定的上限和 低开关频率限制; 并且响应于不超过第三阈值的负载，以第四模式操作，作为具有谷跳跃的BCM，其中开关频率至少取决于负载，并且处于上和下开关频率极限之间，其中上部 开关频率限制随负载减小而减小。 还公开了通过这种方法控制的开关模式转换器。
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公开(公告)号：US08730698B2
公开(公告)日：2014-05-20
申请号：US12981238
申请日：2010-12-29
Applicant: Thomas Antonius Duerbaum , Johann Baptist Daniel Kuebrich , Hans Halberstadt , Frans Pansier , Markus Schmid
Inventor： Thomas Antonius Duerbaum , Johann Baptist Daniel Kuebrich , Hans Halberstadt , Frans Pansier , Markus Schmid
CPC classification number: H02M3/156 , H02M1/4225 , Y02B70/126 , Y02P80/112
Abstract: A power conversion controller for controlling the operation of a switch in a power conversion circuit, wherein the power conversion controller is configured to operate the switch according to: a variable frequency mode of operation for switching frequencies greater than a minimum threshold value; and a fixed frequency mode of operation at a switching frequency equal to the minimum threshold value.
Abstract translation: 一种电力转换控制器，用于控制电力转换电路中的开关的操作，其中所述电力转换控制器被配置为根据以下变化操作所述开关的操作：用于切换大于最小阈值的频率的可变频率工作模式; 以及等于最小阈值的开关频率的固定频率操作模式。
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公开(公告)号：US08441237B2
公开(公告)日：2013-05-14
申请号：US12981142
申请日：2010-12-29
Applicant: Markus Schmid , Johann Baptist Daniel Kuebrich , Thomas Antonius Duerbaum , Gian Hoogzaad , Peter Laro , Frans Pansier
Inventor： Markus Schmid , Johann Baptist Daniel Kuebrich , Thomas Antonius Duerbaum , Gian Hoogzaad , Peter Laro , Frans Pansier
CPC classification number: H02M1/4208 , Y02B70/126
Abstract: Consistent with an example embodiment, a circuit comprises a power factor correction stage having a DC input, a ground input, a DC output and a ground output. The circuit further includes a capacitor; a diode; and a discharge circuit. A first terminal of the diode is connected to an input of the power factor correction stage, a second terminal of the diode is connected to the first plate of the capacitor; and the second plate of the capacitor is connected to the other input of the PFC stage. The discharge circuit is connected to the capacitor and is configured to discharge the capacitor such that it contributes to the output of the PFC stage when the level of a signal at the input of the PFC stage falls below a threshold value.
Abstract translation: 与示例实施例一致，电路包括具有DC输入，接地输入，DC输出和接地输出的功率因数校正级。 电路还包括电容器; 二极管 和放电电路。 二极管的第一端子连接到功率因数校正级的输入端，二极管的第二端子连接到电容器的第一板; 并且电容器的第二板连接到PFC级的另一个输入端。 放电电路连接到电容器，并且被配置为放电电容器，使得当PFC级的输入端的信号电平低于阈值时，它有助于PFC级的输出。
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公开(公告)号：US20110255314A1
公开(公告)日：2011-10-20
申请号：US13142261
申请日：2009-12-21
Applicant: Johann Baptist Daniel Kuebrich , Thomas Antonius Duerbaum , Marcus Schmid , Hans Halberstadt
Inventor： Johann Baptist Daniel Kuebrich , Thomas Antonius Duerbaum , Marcus Schmid , Hans Halberstadt
CPC classification number: H02M1/4208 , H02M3/335 , H02M2001/007 , H02M2001/0096 , Y02B70/126
Abstract: A power supply module having a PFC stage has a hold-up capacitor (34) for continuing output power for a time after an ac power supply (2) stops. The hold-up capacitor is charged by a winding (40) driven magnetically from a first winding (24); the first winding (24) may be the winding used in a boost converter stage, such as commonly used in a PFC stage, or alternatively the winding in an alternative stage such as a flyback converter.
Abstract translation: 具有PFC级的电源模块具有用于在交流电源（2）停止之后持续一段时间的输出功率的保持电容器（34）。 保持电容器由从第一绕组（24）磁力驱动的绕组（40）充电; 第一绕组（24）可以是在升压转换器级中使用的绕组，例如在PFC级中通常使用的绕组，或者替代地，在诸如回扫转换器的替代级中的绕组。
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