-
公开(公告)号：US3987282A
公开(公告)日：1976-10-19
申请号：US570507
申请日：1975-04-22
申请人： Edward H. Lau , John F. Tweedy, Jr.
发明人： Edward H. Lau , John F. Tweedy, Jr.
CPC分类号： B41J7/50 , G05B19/232 , G05B2219/34236 , G05B2219/42182
摘要： There is disclosed a typewriter using a single element print head wherein the tilt and rotate positions for character selection are obtained by servo systems driving tilt and rotate shafts. The system utilizes a digital multiplexing system whereby common elements in the servo channels are time shared. One common element is a binary arithmetic unit which compares binarily represented actual and desired position values of the shafts to fetch from a memory desired velocity information. The fetched velocity information in binary form is compared with the binarily represented actual velocity of the shafts to generate signals for energizing the servo motors which drive the shafts.
摘要翻译： 公开了一种使用单元件打印头的打字机，其中通过驱动倾斜和旋转轴的伺服系统获得用于字符选择的倾斜和旋转位置。 该系统利用数字多路复用系统，由此伺服通道中的共同元件是时间共享的。 一个常见的元件是二进制运算单元，其将二进制表示的实际和期望的位置值与存储器所需的速度信息进行比较。 将二进制形式的获取的速度信息与两轴的实际速度进行比较，以产生用于激励驱动轴的伺服电动机的信号。
-
公开(公告)号：US4472818A
公开(公告)日：1984-09-18
申请号：US577310
申请日：1984-02-06
CPC分类号： G11B20/1423 , G11B20/1419
摘要： A data separator for providing data and clock information derived from a floppy disk to a controller includes a synthetic oscillator phase-locked loop which adjusts the phase of the derived clock, thereby to tend to position data inputs within the central portion of their associated half-bit slots. The center frequency of the synthetic oscillator may be modified in accordance with prior phase adjustments to compensate for variations in the speed of the floppy disk drive.
摘要翻译： 用于将从软盘导出的数据和时钟信息提供给控制器的数据分离器包括合成振荡器锁相环，其调整导出时钟的相位，从而倾向于将数据输入定位在其相关联的半帧的中心部分内， 位插槽。 可以根据先前的相位调整来修改合成振荡器的中心频率，以补偿软盘驱动器的速度变化。
-
3.发明授权
公开(公告)号：US4404554A
公开(公告)日：1983-09-13
申请号：US440598
申请日：1982-11-10
摘要： A microprocessor based CRT video display system includes a microprocessor, a memory and a video processor and controller. The video processor and controller incorporates data and address bus structure in which a plurality of programmable registers are connected to both the data bus and the address bus. The programmable registers arranged along the data and address buses permit efficient retrieval of information from memory for display and also permit the video display system to provide a number of advantageous system features.
摘要翻译： 基于微处理器的CRT视频显示系统包括微处理器，存储器和视频处理器和控制器。 视频处理器和控制器结合数据和地址总线结构，其中多个可编程寄存器连接到数据总线和地址总线。 沿着数据和地址总线布置的可编程寄存器允许从存储器中有效地检索信息以进行显示，并且还允许视频显示系统提供多个有利的系统特征。
-
-
搜索结果
3 条记录 (耗时 0.009 秒)
