False-link protection circuit and method for utilizing same
    1.
    发明申请
    False-link protection circuit and method for utilizing same 失效
    假链路保护电路及其利用方法

    公开(公告)号:US20110204967A1

    公开(公告)日:2011-08-25

    申请号:US12660430

    申请日:2010-02-25

    CPC classification number: H04B3/30 H04L25/0272

    Abstract: Disclosed is a false-link protection circuit comprising at least one native switch coupled between a communication terminal of a first differential switch and a communication terminal of a second differential switch. The at least one native switch is configured to provide an attenuation path for a pulse link signal received by either communication terminal when the first and second differential switches are in a powered down state. According to one embodiment, a method to attenuate a pulse link signal comprises activating a native switch of a false-link protection circuit by powering down first and second differential switches, receiving a pulse link signal at a communication terminal of one of the first and second differential switches, and attenuating the pulse link signal by diverting it through the false-link protection circuit when the first and second differential switches are in a powered down state.

    Abstract translation: 公开了一种假连接保护电路,其包括耦合在第一差分开关的通信终端和第二差分开关的通信终端之间的至少一个本地开关。 至少一个本地开关被配置为当第一和第二差分开关处于断电状态时,为通信终端接收的脉冲链路信号提供衰减路径。 根据一个实施例,一种衰减脉冲链路信号的方法包括通过断电第一和第二差分开关来激活假链路保护电路的本地交换机,在第一和第二差分开关之一的通信终端处接收脉冲链路信号 差分开关,并且当第一和第二差分开关处于掉电状态时,通过将其通过假链路保护电路分流来衰减脉冲链路信号。

    Programmable discontinuity resistors for reference ladders
    2.
    发明申请
    Programmable discontinuity resistors for reference ladders 审中-公开
    可编程不连续电阻,用于参考梯

    公开(公告)号:US20080246537A1

    公开(公告)日:2008-10-09

    申请号:US11905824

    申请日:2007-10-04

    Applicant: Joseph Aziz

    Inventor: Joseph Aziz

    CPC classification number: G05F1/56

    Abstract: A reference ladder having a plurality of embedded, programmable discontinuity resistors for adjusting the output voltages at a plurality of output taps of the ladder. In an embodiment, each discontinuity resistor has a programmable resistance. The reference ladder is factory tested to determine the voltage outputs at a plurality of output taps. A difference between the measured output voltages and the nominal output voltages is calculated. A determination is made of optimized resistances of the discontinuity resistors in order to minimize the differences between measured and nominal output voltages. The discontinuity resistors are then programmed, with the desired resistances stored in a non-volatile memory of the reference ladder. The output of the reference ladder may be further adjusted by using a trimming network at the bottom of the ladder to add a uniform offset to all the output voltages of all the output taps.

    Abstract translation: 一种具有多个嵌入式可编程不连续电阻器的参考梯形图,用于调节梯形图的多个输出抽头处的输出电压。 在一个实施例中,每个不连续电阻器具有可编程电阻。 参考梯形图经过工厂测试,以确定多个输出抽头上的电压输出。 计算测量输出电压和额定输出电压之间的差值。 确定不连续电阻器的优化电阻,以便最小化测量和额定输出电压之间的差异。 然后对不连续电阻进行编程,所需电阻存储在参考梯形图的非易失性存储器中。 可以通过使用梯形图底部的微调网络来进一步调整参考梯形图的输出,以对所有输出抽头的所有输出电压增加均匀的偏移。

    Power efficient driver architecture
    3.
    发明授权
    Power efficient driver architecture 有权
    高效的驱动架构

    公开(公告)号:US09252833B2

    公开(公告)日:2016-02-02

    申请号:US13465216

    申请日:2012-05-07

    CPC classification number: H04B1/586 H04B1/583

    Abstract: Disclosed are various embodiments for providing a power-efficient driver architecture supporting rail-to-rail operation in full duplex mode. A driver is configured to drive a duplex signal over a transmission medium. A hybrid is configured to recover a received signal from the duplex signal. The received signal is generated by a remote transceiver. The driver is configured to drive the duplex signal based at least in part on the received signal recovered by the hybrid.

    Abstract translation: 公开了用于提供支持全双工模式的轨对轨操作的功率有效的驱动器架构的各种实施例。 驱动器被配置为通过传输介质驱动双工信号。 混合器被配置为从双工信号恢复接收到的信号。 接收的信号由远程收发器产生。 驱动器被配置为至少部分地基于由混合器恢复的接收信号来驱动双工信号。

    System and method for power control in a physical layer device
    4.
    发明授权
    System and method for power control in a physical layer device 有权
    物理层设备功率控制的系统和方法

    公开(公告)号:US09231655B2

    公开(公告)日:2016-01-05

    申请号:US13446454

    申请日:2012-04-13

    CPC classification number: H04B3/00 H04L12/12 Y02D50/40 Y02D50/42

    Abstract: A system and method for power control in a physical layer device. Energy savings during an active state can be produced through the monitoring of a received signal level by a receiver in a physical layer device. In one embodiment, based on an indication of the received signal level or other communication characteristic of the transmission medium, a control module can adjust the signal level or amplitude and/or adjust the voltage supply.

    Abstract translation: 一种用于物理层设备中功率控制的系统和方法。 可以通过物理层设备中的接收机监视接收到的信号电平来产生活动状态期间的节能。 在一个实施例中,基于传输介质的接收信号电平或其他通信特性的指示,控制模块可以调整信号电平或振幅和/或调整电压供应。

    False-link protection circuit and method for utilizing same
    5.
    发明授权
    False-link protection circuit and method for utilizing same 失效
    假链路保护电路及其利用方法

    公开(公告)号:US08228091B2

    公开(公告)日:2012-07-24

    申请号:US12660430

    申请日:2010-02-25

    CPC classification number: H04B3/30 H04L25/0272

    Abstract: Disclosed is a false-link protection circuit comprising at least one native switch coupled between a communication terminal of a first differential switch and a communication terminal of a second differential switch. The at least one native switch is configured to provide an attenuation path for a pulse link signal received by either communication terminal when the first and second differential switches are in a powered down state. According to one embodiment, a method to attenuate a pulse link signal comprises activating a native switch of a false-link protection circuit by powering down first and second differential switches, receiving a pulse link signal at a communication terminal of one of the first and second differential switches, and attenuating the pulse link signal by diverting it through the false-link protection circuit when the first and second differential switches are in a powered down state.

    Abstract translation: 公开了一种假连接保护电路,其包括耦合在第一差分开关的通信终端和第二差分开关的通信终端之间的至少一个本地开关。 至少一个本地开关被配置为当第一和第二差分开关处于断电状态时,为通信终端接收的脉冲链路信号提供衰减路径。 根据一个实施例,一种衰减脉冲链路信号的方法包括通过断电第一和第二差分开关来激活假链路保护电路的本地交换机,在第一和第二差分开关之一的通信终端处接收脉冲链路信号 差分开关,并且当第一和第二差分开关处于掉电状态时,通过将其通过假链路保护电路分流来衰减脉冲链路信号。

    Switchable Passive Termination Circuits
    6.
    发明申请
    Switchable Passive Termination Circuits 有权
    可切换被动终端电路

    公开(公告)号:US20110254584A1

    公开(公告)日:2011-10-20

    申请号:US13173706

    申请日:2011-06-30

    CPC classification number: H04L25/0298

    Abstract: According to one exemplary embodiment, an active termination circuit includes at least one active termination branch, where the at least one active termination branch includes at least one transistor for providing an active termination output. The at least one active termination branch further includes an amplifier driving the at least one transistor, where the amplifier has a non-inverting input coupled to the active termination output via a feedback network. The amplifier controls a current flowing through the at least one transistor so as to provide the active termination output. The active termination output can be provided at a drain of the at least one transistor, where a source of the at least one transistor is coupled to ground through a degeneration transistor and a tail current sink.

    Abstract translation: 根据一个示例性实施例,有源终端电路包括至少一个有源终端分支,其中所述至少一个有源终端分支包括用于提供有源终端输出的至少一个晶体管。 所述至少一个有源终端分支还包括驱动所述至少一个晶体管的放大器,其中所述放大器具有经由反馈网络耦合到所述有源终端输出的非反相输入。 放大器控制流过至少一个晶体管的电流,以便提供有源终端输出。 可以在至少一个晶体管的漏极处提供有源终端输出,其中至少一个晶体管的源极通过退化晶体管和尾部电流吸收器耦合到地。

    Line Driver with Reduced Dependency on Process, Voltage, and Temperature
    7.
    发明申请
    Line Driver with Reduced Dependency on Process, Voltage, and Temperature 有权
    线路驱动器与过程,电压和温度相关性降低

    公开(公告)号:US20110199129A1

    公开(公告)日:2011-08-18

    申请号:US13095688

    申请日:2011-04-27

    Abstract: According to one exemplary embodiment, a transmitter module includes a line drive including a current digital-to-analog converter, where the line driver provides an analog output waveform. The current digital-to-analog converter receives a digitally filtered input waveform including at least two voltage steps. The at least two voltage steps of the digitally filtered input waveform cause a rise time of the analog output waveform to have a reduced dependency on process, voltage, and temperature variations in the line driver, while meeting stringent rise time requirements. The digitally filtered input waveform has an initial voltage level and a final voltage level, where the final voltage level is substantially equal to a sum of the at least two voltage steps of the digitally filtered input waveform.

    Abstract translation: 根据一个示例性实施例,发射机模块包括线路驱动器,其包括当前的数模转换器,其中线路驱动器提供模拟输出波形。 当前的数模转换器接收包括至少两个电压步骤的经数字滤波的输入波形。 数字滤波的输入波形的至少两个电压阶段导致模拟输出波形的上升时间对线路驱动器中的过程,电压和温度变化的依赖性降低,同时满足严格的上升时间要求。 经数字滤波的输入波形具有初始电压电平和最终电压电平,其中最终电压电平基本上等于数字滤波输入波形的至少两个电压阶跃之和。

    Active termination and switchable passive termination circuits
    8.
    发明授权
    Active termination and switchable passive termination circuits 有权
    主动终端和可切换无源终端电路

    公开(公告)号:US07982491B2

    公开(公告)日:2011-07-19

    申请号:US12384793

    申请日:2009-04-08

    CPC classification number: H04L25/0298

    Abstract: According to one exemplary embodiment, an active termination circuit includes at least one active termination branch, where the at least one active termination branch includes at least one transistor for providing an active termination output. The at least one active termination branch further includes an amplifier driving the at least one transistor, where the amplifier has a non-inverting input coupled to the active termination output via a feedback network. The amplifier controls a current flowing through the at least one transistor so as to provide the active termination output. The active termination output can be provided at a drain of the at least one transistor, where a source of the at least one transistor is coupled to ground through a degeneration transistor and a tail current sink.

    Abstract translation: 根据一个示例性实施例,有源终端电路包括至少一个有源终端分支,其中所述至少一个有源终端分支包括用于提供有源终端输出的至少一个晶体管。 所述至少一个有源终端分支还包括驱动所述至少一个晶体管的放大器,其中所述放大器具有经由反馈网络耦合到所述有源终端输出的非反相输入。 放大器控制流过至少一个晶体管的电流,以便提供有源终端输出。 可以在至少一个晶体管的漏极处提供有源终端输出,其中至少一个晶体管的源极通过退化晶体管和尾部电流吸收器耦合到地。

    POWER-EFFICIENT DRIVER ARCHITECTURE
    9.
    发明申请
    POWER-EFFICIENT DRIVER ARCHITECTURE 有权
    功率有效的驱动架构

    公开(公告)号:US20130294294A1

    公开(公告)日:2013-11-07

    申请号:US13465216

    申请日:2012-05-07

    CPC classification number: H04B1/586 H04B1/583

    Abstract: Disclosed are various embodiments for providing a power-efficient driver architecture supporting rail-to-rail operation in full duplex mode. A driver is configured to drive a duplex signal over a transmission medium. A hybrid is configured to recover a received signal from the duplex signal. The received signal is generated by a remote transceiver. The driver is configured to drive the duplex signal based at least in part on the received signal recovered by the hybrid.

    Abstract translation: 公开了用于提供支持全双工模式的轨对轨操作的功率有效的驱动器架构的各种实施例。 驱动器被配置为通过传输介质驱动双工信号。 混合器被配置为从双工信号恢复接收到的信号。 接收的信号由远程收发器产生。 驱动器被配置为至少部分地基于由混合器恢复的接收信号来驱动双工信号。

    Switchable passive termination circuits
    10.
    发明授权
    Switchable passive termination circuits 有权
    可切换无源终端电路

    公开(公告)号:US08289046B2

    公开(公告)日:2012-10-16

    申请号:US13173706

    申请日:2011-06-30

    CPC classification number: H04L25/0298

    Abstract: According to one exemplary embodiment, an active termination circuit includes at least one active termination branch, where the at least one active termination branch includes at least one transistor for providing an active termination output. The at least one active termination branch further includes an amplifier driving the at least one transistor, where the amplifier has a non-inverting input coupled to the active termination output via a feedback network. The amplifier controls a current flowing through the at least one transistor so as to provide the active termination output. The active termination output can be provided at a drain of the at least one transistor, where a source of the at least one transistor is coupled to ground through a degeneration transistor and a tail current sink.

    Abstract translation: 根据一个示例性实施例,有源终端电路包括至少一个有源终端分支,其中所述至少一个有源终端分支包括用于提供有源终端输出的至少一个晶体管。 所述至少一个有源终端分支还包括驱动所述至少一个晶体管的放大器,其中所述放大器具有经由反馈网络耦合到所述有源终端输出的非反相输入。 放大器控制流过至少一个晶体管的电流,以便提供有源终端输出。 可以在至少一个晶体管的漏极处提供有源终端输出,其中至少一个晶体管的源极通过退化晶体管和尾部电流吸收器耦合到地。

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