公开(公告)号：US08386688B2

公开(公告)日：2013-02-26

申请号：US12770690

申请日：2010-04-29

Applicant: Mark N. Fullerton ,  Robert Morris ,  Lance Flake ,  Lawrence J. Madar, III ,  Sam Liu ,  Chaoyang Zhao ,  Vinay Bhasin ,  Joyjit Nath ,  Bhupesh Kharwa ,  Claude G. Hayek

Inventor： Mark N. Fullerton ,  Robert Morris ,  Lance Flake ,  Lawrence J. Madar, III ,  Sam Liu ,  Chaoyang Zhao ,  Vinay Bhasin ,  Joyjit Nath ,  Bhupesh Kharwa ,  Claude G. Hayek

IPC: G06F13/36

CPC classification number: G06F13/28 ,  G06F1/10 ,  G06F1/26 ,  G06F13/4027 ,  G06F2213/0038 ,  Y02D30/34

Abstract: A modular integrated circuit includes a hub module that is coupled to a plurality of spoke modules via a plurality of hub interfaces. The plurality of hub interfaces provide a plurality of signal interfaces between the hub module and each of the plurality of spoke modules, wherein each of the plurality of signal interfaces is isolated from each of the other signal interfaces of the plurality of signals interface, and wherein each of the plurality of signal interfaces operates in accordance with a common signaling format.

公开(公告)号：US20110271028A1

公开(公告)日：2011-11-03

申请号：US12770690

申请日：2010-04-29

Applicant: Mark N. Fullerton ,  Robert Morris ,  Lance Flake ,  Lawrence J. Madar, III ,  Sam Liu ,  Chaoyang Zhao ,  Vinay Bhasin ,  Joyjit Nath ,  Bhupesh Kharwa ,  Claude G. Hayek

Inventor： Mark N. Fullerton ,  Robert Morris ,  Lance Flake ,  Lawrence J. Madar, III ,  Sam Liu ,  Chaoyang Zhao ,  Vinay Bhasin ,  Joyjit Nath ,  Bhupesh Kharwa ,  Claude G. Hayek

IPC: G06F13/36 ,  G06F1/24

CPC classification number: G06F13/28 ,  G06F1/10 ,  G06F1/26 ,  G06F13/4027 ,  G06F2213/0038 ,  Y02D30/34

Abstract: A modular integrated circuit includes a hub module that is coupled to a plurality of spoke modules via a plurality of hub interfaces. The plurality of hub interfaces provide a plurality of signal interfaces between the hub module and each of the plurality of spoke modules, wherein each of the plurality of signal interfaces is isolated from each of the other signal interfaces of the plurality of signals interface, and wherein each of the plurality of signal interfaces operates in accordance with a common signaling format.

Abstract translation: 模块化集成电路包括经由多个集线器接口耦合到多个辐条模块的集线器模块。 所述多个集线器接口在所述集线器模块和所述多个辐条模块中的每一个之间提供多个信号接口，其中所述多个信号接口中的每一个与所述多个信号接口中的每一个信号接口隔离，并且其中 多个信号接口中的每一个根据公共信令格式进行操作。

公开(公告)号：US06892324B1

公开(公告)日：2005-05-10

申请号：US09618965

申请日：2000-07-19

Applicant: Robert S. French ,  Gareld H. Banta ,  Glen Weaver ,  Joyjit Nath ,  Viresh Rustagi

Inventor： Robert S. French ,  Gareld H. Banta ,  Glen Weaver ,  Joyjit Nath ,  Viresh Rustagi

IPC: G06F11/36 ,  G06F11/00

CPC classification number: G06F11/3636 ,  G06F11/3648

Abstract: A method and apparatus for debugging are described. In one embodiment, a target construct is selected for debugging. Data related to an operation of the target construct is accessed by a debug construct in real time. At least a portion of this data is retrieved without disturbing the operation of the target construct to debug the target construct.

Abstract translation: 描述用于调试的方法和装置。 在一个实施例中，选择目标结构用于调试。 与目标结构的操作相关的数据由调试构造实时访问。 在不干扰目标结构的操作以调试目标结构的情况下检索该数据的至少一部分。