公开(公告)号：US5344524A

公开(公告)日：1994-09-06

申请号：US85422

申请日：1993-06-30

申请人： Kalluri R. Sharma ,  Michael S. Liu

发明人： Kalluri R. Sharma ,  Michael S. Liu

IPC分类号： H01L27/12 ,  H01L21/02 ,  H01L21/20 ,  H01L21/3065 ,  H01L21/762 ,  H01L21/306

CPC分类号： H01L21/76264 ,  H01L21/2007 ,  H01L21/3065 ,  H01L21/76256 ,  H01L21/76275 ,  H01L21/76283 ,  H01L21/76289 ,  Y10S148/012 ,  Y10S438/97

摘要： A back-etch silicon-on-insulator SOI process that has a silicon handle wafer with an oxide layer bonded at room temperature to a silicon device wafer with an etch stop and silicon device layer. The surfaces that are bonded at room temperature are first conditioned to be hydrophilic. After bonding, the edges of the layers are sealed. The silicon device wafer, the etch-stop layer and the device layer are boron doped. Most of the silicon device wafer is ground away. Then, the remaining portion of the silicon device wafer and the etch stop layer are chemically etched away, thereby leaving a uniform layer of silicon device layer on the oxide layer of the silicon handle wafer. Because the bonding, grinding and selective etching are performed at room temperature, inter-diffusion of the boron between the various layers is prevented and thus permits the selective etching process to result in a nearly perfect silicon device layer in terms of an even-surfaced, defect-free and thin layer on the buried oxide layer of silicon handle wafer. The resulting SOI wafer is then annealed at a high temperature, prior to device processing.

摘要翻译： 背面蚀刻绝缘体上硅SOI工艺，其具有硅处理晶片，其氧化物层在室温下与蚀刻停止和硅器件层结合到硅器件晶片。 首先将在室温下结合的表面调节为亲水性。 粘合后，层的边缘被密封。 硅器件晶片，蚀刻停止层和器件层是硼掺杂的。 大多数硅器件晶片被磨掉。 然后，硅器件晶片和蚀刻停止层的剩余部分被化学蚀刻掉，从而在硅处理晶片的氧化物层上留下均匀的硅器件层层。 由于在室温下进行接合，研磨和选择性蚀刻，因此可以防止各层之间的硼的相互扩散，从而允许选择性蚀刻工艺在均匀表面， 在硅处理晶圆的掩埋氧化层上的无缺陷和薄层。 然后在器件处理之前，将所得的SOI晶片在高温下退火。